MCP2510-EP Microchip Technology, MCP2510-EP Datasheet
MCP2510-EP
Related parts for MCP2510-EP
MCP2510-EP Summary of contents
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... SPI is a registered trademark of Motorola Inc. 1999 Microchip Technology Inc. MCP2510 ® DESCRIPTION The Microchip Technology Inc. MCP2510 is a Full Con- troller Area Network (CAN) protocol controller imple- menting CAN specification V2.0 A/B. It supports CAN 1.2, CAN 2.0A, CAN 2.0B Passive, and CAN 2.0B Active versions of the protocol, and is capable of transmitting and receiving standard and extended messages ...
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... SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 12.0 Electrical Characteristics 13.0 Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 On-Line Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Reader Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 MCP2510 Product Identification System Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 List Of Figures List Of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 List Of Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Worldwide Sales and Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please check our Worldwide Web site at: http://www ...
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... Overview The MCP2510 is a stand-alone CAN controller devel- oped to simplify applications that require interfacing with a CAN bus. A simple block diagram of the MCP2510 is shown in Figure 1-1. The device consists of three main blocks: 1. the CAN protocol engine, 2. the control logic and SRAM registers that are ...
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... Controller MCP2510 CAN Transceiver CAN CAN Transceiver Transceiver MCP2510 MCP2510 Node Node Controller Controller Description Transmit output pin to CAN bus Receive input pin from CAN bus Clock output pin with programmable prescaler Transmit buffer TXB0 request to send or general purpose digital input. -100K Transmit buffer TXB1 request to send or general purpose digital input ...
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... Transmit/Receive Buffers The MCP2510 has three transmit and two receive buffers, two acceptance masks (one for each receive buffer), and a total of six acceptance filters. Figure 1 block diagram of these buffers and their connection to the protocol engine. BUFFERS TXB0 TXB1 Message Queue ...
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... MCP2510 1.3 CAN Protocol Engine The CAN protocol engine combines several functional blocks, shown in Figure 1-4. These blocks and their functions are described below. 1.4 Protocol Finite State Machine The heart of the engine is the Finite State Machine (FSM). This state machine sequences through mes- sages on a bit by bit basis, changing states as the fields of the various frame types are transmitted or received ...
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... CAN MESSAGE FRAMES The MCP2510 supports Standard Data Frames, Extended Data Frames, and Remote Frames (Standard and Extended) as defined in the CAN 2.0B specification. 2.1 Standard Data Frame The CAN Standard Data Frame is shown in Figure 2-1. In common with all other frames, the frame begins with a Start Of Frame (SOF) bit, which is of the dominant state, which allows hard synchronization of all nodes ...
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... MCP2510 2.4 Error Frame An Error Frame is generated by any node that detects a bus error. An error frame, shown in Figure 2-4, con- sists of two fields, an error flag field followed by an error delimiter field. There are two types of error flag fields. Which type of error flag field is sent depends upon the error status of the node that detects and generates the error flag field ...
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... FIGURE 2-1: Standard Data Frame S 1999 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 Bit Reserved IDE RTR ID0 ID3 10 ID Frame of Start Preliminary MCP2510 DS21291C-page 9 ...
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... MCP2510 FIGURE 2-2: Extended Data Frame DS21291C-page 10 Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 bits Reserved RB1 RTR EID0 EID17 IDE SRR ID0 ID3 ID10 Frame of Start Preliminary 1999 Microchip Technology Inc. ...
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... FIGURE 2-3: Remote Data Frame 1999 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 bits Reserved RB1 RTR EID0 EID17 IDE SRR ID0 ID3 ID10 Frame of Start Preliminary MCP2510 DS21291C-page 11 ...
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... MCP2510 Frame of FIGURE 2-4: Error Frame DS21291C-page 12 DLC0 DLC3 RB0 Bit Reserved IDE RTR ID0 ID3 10 ID Start Preliminary 1999 Microchip Technology Inc. ...
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... FIGURE 2-5: Overload Frame 1999 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 IDE RTR ID0 10 ID Frame of Start Preliminary MCP2510 DS21291C-page 13 ...
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... MCP2510 NOTES: DS21291C-page 14 Preliminary 1999 Microchip Technology Inc. ...
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... Configuration and control of these pins is accomplished using the TXRTSCTRL register (see Register 3-2). The TXRTSCTRL register can only be modified when the MCP2510 is in configuration mode (see Section 9.0). If configured to operate as a request to send pin, the pin is mapped into the respective TXB for the transmit buffer. The TXREQ bit is latched by the ...
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... MCP2510 of a message has begun error occurs on the bus or if the message loses arbitration, the message will be retransmitted regardless of a request to abort. Start Are any No TXB CTRL.TXREQ N bits = 1 Clear: TXB CTRL.ABTF N TXB CTRL.MLOA N TXB CTRL.TXERR N Is CAN Bus available to start transmission Examine TXB CTRL.TXP < ...
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... Lowest Message Priority REGISTER 3-1: TXB CTRL Transmit Buffer N 1999 Microchip Technology Inc. R/W-0 U-0 R/W-0 R/W-0 — TXP1 TXP0 bit 0 Control Register (ADDRESS: 30h, 40h, 50h) N Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset DS21291C-page 17 ...
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... MCP2510 U-0 U-0 R-x R-x — — B2RTS B1RTS B0RTS bit 7 bit 7: Unimplemented: Reads as ‘0’ bit 6: Unimplemented: Reads as ‘0’ bit 5: B2RTS: TX2RTS Pin State - Reads state of TX2RTS pin when in digital input mode - Reads as ‘0’ when pin is in ‘request to send’ mode bit 4: ...
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... R/W-x R/W-x R/W-x EID3 EID2 EID1 EID0 bit 0 Extended Identifier LOW (ADDRESS: 34h, 44h, 54h) N Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘ ...
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... MCP2510 R/W-x R/W-x R/W-x R/W-x — RTR — — bit 7 bit 7: Unimplemented: Reads as ‘0’ bit 6: RTR: Remote Transmission Request Bit 1 = Transmitted Message will be a Remote Transmit Request 0 = Transmitted Message will be a Data Frame bit 5-4: Unimplemented: Reads as ‘0’ bit 3-0: DLC<3:0>: Data Length Code Sets the number of data bytes to be transmitted ( bytes) ...
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... MESSAGE RECEPTION 4.1 Receive Message Buffering The MCP2510 includes two full receive buffers with multiple acceptance filters for each. There is also a separate Message Assembly Buffer (MAB) which acts as a third receive buffer (see Figure 4-1). 4.2 Receive Buffers Of the three Receive Buffers, the MAB is always com- mitted to receiving the next message from the bus ...
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... MCP2510 Acceptance Mask RXM0 Acceptance Filter RXF0 A c Acceptance Filter c RXF1 Identifier B 0 Data Field FIGURE 4-1: Receive Buffer Block Diagram DS21291C-page 22 Acceptance Mask RXM1 Acceptance Filter RXF2 Acceptance Filter RXF3 Acceptance Filter RXF4 Acceptance Filter RXF5 M A Identifier B Data Field ...
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... Go to Start Generate Interrupt on INT RXB1 RXB0 Set CANSTAT <3:0> accord- ing to which receive buffer the message was loaded into Set RXBF1 Pin = 0 Preliminary MCP2510 Is No CANINTF.RX1IF = 0 ? Yes Move message into RXB1 Set CANINTF.RX1IF=1 Set RXB0CTRL.FILHIT <2:0> according to which filter criteria was met Yes CANINTE ...
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... BUKT: Rollover Enable 1 = RXB0 message will rollover and be written to RXB1 if RXB0 is full 0 = Rollover disabled bit 1: BUKT1: Read Only Copy of BUKT Bit (used internally by the MCP2510). bit 0: FILHIT<0>: Filter Hit - indicates which acceptance filter enabled reception of message 1 = Acceptance Filter 1 (RXF1 Acceptance Filter 0 (RXF0) ...
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... Acceptance Filter 0 (RXF0) (Only if BUKT bit set in RXB0CTRL) REGISTER 4-2: RXB1CTRL - Receive Buffer 1 Control Register (ADDRESS: 70h) 1999 Microchip Technology Inc. R-0 R-0 R-0 R-0 RXRTR FILHIT2 FILHIT1 FILHIT0 bit 0 Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset DS21291C-page 25 ...
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... MCP2510 U-0 U-0 R/W-0 R/W-0 — — B1BFS B0BFS bit 7 bit 7: Unimplemented: Reads as ‘0’ bit 6: Unimplemented: Reads as ‘0’ bit 5: B1BFS: RX1BF Pin State (digital output mode only) Reads as 0 when RX1BF is configured as interrupt pin bit 4: B0BFS: RX0BF Pin State (digital output mode only) ...
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... R-x R-x R-x EID3 EID2 EID1 EID0 bit 0 Extended Identifier Low (ADDRESS: 64h, 74h) N Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘ ...
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... MCP2510 U-0 R-x R-x R-x — RTR RB1 RB0 bit 7 bit 7: Unimplemented: Reads as ’0’ bit 6: RTR: Extended Frame Remote Transmission Request Bit (valid only when RXBnSIDL.IDE = Extended Frame Remote Transmit Request Received 0 = Extended Data Frame Received bit 5: RB1: Reserved Bit 1 bit 4: RB0: Reserved Bit 0 bit 3-0: DLC< ...
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... RXF2. This essentially prioritizes the accep- tance filters with a lower number filter having higher pri- ority. Messages are compared to filters in ascending order of filter number. The mask and filter registers can only be modified when the MCP2510 is in configuration mode (see Section 9.0). Preliminary MCP2510 DS21291C-page 29 ...
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... MCP2510 Acceptance Filter Register RXFn 0 RXFn 1 RXFn Message Assembly Buffer Identifier FIGURE 4-3: Message Acceptance Mask and Filter Operation R/W-x R/W-x R/W-x R/W-x SID10 SID9 SID8 SID7 bit 7 bit 7-0: SID<10:3>: Standard Identifier Filter Bits <10:3> These bits hold the filter bits to be applied to bits <10:3> of the Standard Identifier portion of a received ...
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... R/W-x R/W-x EID3 EID2 EID1 EID0 bit 0 Extended Identifier Low (Address: 03h, 07h, 0Bh, 13h, 17h, 1Bh) N Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset R = Readable bit W = Writable bit C = Bit can be cleared by ...
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... MCP2510 R/W-x R/W-x R/W-x R/W-x SID10 SID9 SID8 SID7 bit 7 bit 7-0: SID<10:3>: Standard Identifier Mask Bits <10:3> These bits hold the mask bits to be applied to bits <10:3> of the Standard Identifier portion of a received message REGISTER 4-14: RXM SIDH - Acceptance Filter Mask N R/W-x R/W-x R/W-x U-0 SID2 SID1 SID0 — bit 7 bit 7-5: SID<2:0>: Standard Identifier Mask Bits <2:0> ...
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... REGISTER 4-17: RXM EID0 - Acceptance Filter Mask N 1999 Microchip Technology Inc. R/W-x R/W-x R/W-x R/W-x EID3 EID2 EID1 EID0 bit 0 Extended Identifier Low (Address: 23h, 27h) N Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset DS21291C-page 33 ...
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... MCP2510 NOTES: DS21291C-page 34 Preliminary 1999 Microchip Technology Inc. ...
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... Digital Phase Lock Loop (DPLL) synchronization. The bit timing of the MCP2510 is implemented using a DPLL that is configured to synchronize to the incoming data, and provide the nominal timing for the transmitted data ...
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... The CAN speci- fication defines this time to be less than or equal The MCP2510 defines this time segment 2 must be at least 2 T Preliminary BUS ...
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... Q Phase SJW Segment 1 Sample t Poin Preliminary MCP2510 . The Q as follows: Q Phase Segment 2 Actual Bit Nominal Length Bit Length DS21291C-page 37 ...
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... MCP2510 Input Signal Prop Sync Segment T Q FIGURE 5-3: Shortening a Bit Period 5.8 Programming Time Segments Some requirements for programming of the time seg- ments: • Prop Seg + Phase Seg 1 >= Phase Seg 2 • Prop Seg + Phase Seg 1 >= T DELAY • Phase Seg 2 > Sync Jump Width ...
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... Bit Timing Configuration Registers The configuration registers (CNF1, CNF2, CNF3) con- trol the bit timing for the CAN bus interface. These reg- isters can only be modified when the MCP2510 is in configuration mode (see Section 9.0). 5.10.1 CNF1 The BRP<5:0> bits control the baud rate prescaler. ...
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... MCP2510 R/W-0 R/W-0 R/W-0 R/W-0 BTLMODE SAM PHSEG12 PHSEG11 PHSEG10 PRSEG2 PRSEG1 PRSEG0 bit 7 bit 7: BTLMODE: Phase Segment 2 Bit Time Length 1 = Length of Phase Seg 2 determined by PHSEG22:PHSEG20 bits of CNF3 0 = Length of Phase Seg 2 is the greater of Phase Seg 1 and IPT (2T bit 6: SAM: Sample Point Configuration 1 = Bus line is sampled three times at the sample point 0 = Bus line is sampled once at the sample point bit 5-3: PHSEG1< ...
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... MCU, if the bus remains idle for 128 X 11 bit times. If this is not desired, the error inter- rupt service routine should address this. The current error mode of the MCP2510 can be read by the MCU via the EFLG register (Register 6-3). Additionally, there is an error state warning flag bit, ...
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... MCP2510 REC > 127 or TEC > 127 Error-Passive FIGURE 6-1: Error Modes State Diagram R-0 R-0 R-0 R-0 TEC7 TEC6 TEC5 TEC4 bit 7 bit 7-0: TEC<7:0>: Transmit Error Count REGISTER 6-1: TEC - Transmitter Error Counter (ADDRESS: 1Ch) R-0 R-0 R-0 R-0 REC7 REC6 REC5 REC4 bit 7 bit 7-0: REC<7:0>: Receive Error Count REGISTER 6-2: REC - Receiver Error Counter (ADDRESS: 1Dh) ...
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... Reset when both REC and TEC are less than 96 - REGISTER 6-3: EFLG - Error Flag Register (ADDRESS: 2Dh) 1999 Microchip Technology Inc. R-0 R-0 R-0 R-0 RXEP TXWAR RXWAR EWARN bit 0 Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset DS21291C-page 43 ...
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... MCP2510 NOTES: DS21291C-page 44 Preliminary 1999 Microchip Technology Inc. ...
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... Bus Activity Wakeup Interrupt When the MCP2510 is in sleep mode and the bus activ- ity wakeup interrupt is enabled (CANINTE.WAKIE = 1), an interrupt will be generated on the INT pin, and the CANINTF.WAKIF bit will be set when activity is detected on the CAN bus ...
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... MCP2510 7.6 Error Interrupt When the error interrupt is enabled (CANINTE.ERRIE = 1) an interrupt is generated on the INT pin if an over- flow condition occurs or if the error state of transmitter or receiver has changed. The Error Flag Register (EFLG) will indicate one of the following conditions. 7.6.1 RECEIVER OVERFLOW ...
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... Interrupt pending (must be cleared by MCU to reset interrupt condition) REGISTER 7-2: CANINTF - Interrupt FLAG Register (ADDRESS: 2Ch) 1999 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 R/W-0 TX1IF TX0IF RX1IF RX0IF bit 0 Preliminary MCP2510 R = Readable bit W = Writable bit C = Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset DS21291C-page 47 ...
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... MCP2510 NOTES: DS21291C-page 48 Preliminary 1999 Microchip Technology Inc. ...
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... OSCILLATOR The MCP2510 is designed to be operated with a crystal or ceramic resonator connected to the OSC1 and OSC2 pins. The MCP2510 oscillator design requires the use of a parallel cut crystal. Use of a series cut crys- tal may give a frequency out of the crystal manufactur- ers specifications. A typical oscillator circuit is shown in Figure 8-1 ...
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... MCP2510 330 k 74AS04 0.1 mF XTAL Note 1: Duty cycle restrictions must be observed (see Table 12-2). FIGURE 8-3: External Series Resonant Crystal Oscillator Circuit DS21291C-page 50 To Other Devices 330 k 74AS04 74AS04 Preliminary MCP2510 OSC1 1999 Microchip Technology Inc. ...
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... When in internal sleep mode, the wakeup interrupt is still active (if enabled). This is done so the MCU can also be placed into a sleep mode and use the MCP2510 to wake it up upon detecting activity on the bus. 1999 Microchip Technology Inc. ...
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... Normal Mode This is the standard operating mode of the MCP2510. In this mode the device actively monitors all bus mes- sages and generates acknowledge bits, error frames, etc. This is also the only mode in which the MCP2510 will transmit messages over the CAN bus. U-0 R/W-1 ...
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... Unimplemented: Reads as ‘0’ REGISTER 9-2: CANSTAT - CAN Status Register (ADDRESS: xEh) 1999 Microchip Technology Inc. R-0 R-0 R-0 — ICOD2 ICOD1 ICOD0 Preliminary MCP2510 U-0 — Readable bit W = Writable bit bit Bit can be cleared by MCU but not set U = Unimplemented - reads as ‘0’ Value at POR reset ...
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... MCP2510 NOTES: DS21291C-page 54 Preliminary 1999 Microchip Technology Inc. ...
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... REGISTER MAP The register map for the MCP2510 is shown in Table 10-1. Address locations for each register are determined by using the column (higher order 4 bits) and row (lower order 4 bits) values. The registers have been arranged to optimize the sequential reading and Lower Address Bits ...
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... MCP2510 NOTES: DS21291C-page 56 Preliminary 1999 Microchip Technology Inc. ...
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... Mode 0,0 and Mode 1,1. Commands and data are sent to the device via the SI pin, with data being clocked in on the rising edge of SCK. Data is driven out by the MCP2510, on the SO line, on the falling edge of SCK. The CS pin must be held low while any operation is performed. Table 11-1 shows the instruction bytes for all operations ...
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... MCP2510 Instruction Name Instruction Format RESET 1100 0000 READ 0000 0011 WRITE 0000 0010 RTS 1000 0nnn (Request To Send) Read Status 1010 0000 Bit Modify 0000 0101 TABLE 11-1: SPI Instruction Set SCK instruction ...
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... Preliminary MCP2510 data byte 23 repeat data out CANINTF.RX0IF CANINTF.RX1IF TXB0CNTRL.TXREQ CANINTF.TX0IF TXB1CNTRL.TXREQ CANINTF.TX1IF TXB2CNTRL.TXREQ CANINTF.TX2IF ...
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... MCP2510 CS SCK SI SO FIGURE 11-7: RESET Instruction CS T CSS Mode 1,1 SCK Mode 0 MSB in high impedance SO FIGURE 11-8: SPI Input Timing SCK MSB out SI FIGURE 11-9: SPI Output Timing DS21291C-page instruction high impedance ...
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... RESET = – 25°C, f AMB V = 5.0V (Note) DD – 5.5V CS, TXnRTS = V Preliminary MCP2510 Test Conditions = 4.5V, I temp 1.0 MHz, C =5.0 MHz Open CLK , Inputs tied DS21291C-page 61 ...
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... MCP2510 All parameters apply over the Industrial (I): specified operating ranges unless Automotive (E): otherwise noted. Parameter Symbol Clock In Frequency F Clock In Period T Clock In High, Low Time T OSL Clock In Rise, Fall Time T OSR Duty Cycle (External Clock Input) T Note: This parameter is periodically sampled and not 100% tested. ...
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... V – 115 ns – 180 ns 0 – – 200 ns Preliminary MCP2510 Test Conditions V = 4. 4.5V to 5.5V (E temp 3. 4. 4.5V to 5.5V (E temp =3. 4. 4.5V to 5.5V (E temp 3. ...
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... MCP2510 NOTES: DS21291C-page 64 Preliminary 1999 Microchip Technology Inc. ...
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... PACKAGING INFORMATION 14.1 Package Marking Information Not available at the time of printing. Will be made available after definition of QS9000 standard. 1999 Microchip Technology Inc. 14.2 Package Details The following sections give the technical details of the packages. compliant Preliminary MCP2510 DS21291C-page 65 ...
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... MCP2510 Package Type: 18-Lead Plastic Dual In-line (P) – 300 mil (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness ...
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... A1 .004 .008 .012 E .394 .407 .420 E1 .291 .295 .299 D .446 .454 .462 h .010 .020 .029 L .016 .033 .050 .009 .011 .012 B .014 .017 .020 Preliminary MCP2510 A2 MILLIMETERS MIN NOM MAX 18 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.39 7.49 7.59 11.33 11.53 11.73 0.25 0.50 0.74 0.41 0.84 1. 0.23 0.27 0.30 0.36 0.42 0. ...
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... MCP2510 Package Type: 20-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness ...
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... MCP2510 ON-LINE SUPPORT Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape or Microsoft Explorer ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: MCP2510 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this data sheet easy to follow? If not, why? 4 ...
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... Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 1999 Microchip Technology Inc Plastic DIP (300 mil Body), 18-lead SO = Plastic SOIC (300 mil Body), 18-lead ST = TSSOP, (4.4 mil), 20-lead I = –40°C to +85° –40°C to +125°C MCP2510 = MCP2510T = (Tape and Reel) Preliminary MCP2510 980106 DS21291C-page 71 ...
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... MCP2510 NOTES: DS21291C-page 72 Preliminary 1999 Microchip Technology Inc. ...
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... RXFnEID8 - Acceptance Filter n Extended Identifier Mid RXFnSIDH - Acceptance Filter n Standard Identifier High 30 RXFnSIDL - Acceptance Filter n Standard Identifier Low RXMnEID0 - Acceptance Filter Mask n Extended Identifier Low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 RXMnEID8 - Acceptance Filter Mask n Extended Identifier Mid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 RXMnSIDH - Acceptance Filter Mask n Standard Identifier High . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Preliminary MCP2510 , DS21291C-page 73 ...
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... MCP2510 RXMnSIDL - Acceptance Filter Mask n Standard Identifier Low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 S Sample Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Shortening a Bit Period . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 SPI Interface Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 SPI Port AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 63 Standard Data Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Stuff Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Synchronization Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Synchronization Segment . . . . . . . . . . . . . . . . . . . . . . . . . 36 DS21291C-page 74 T TEC - Transmitter Error Count . . . . . . . . . . . . . . . . . . . . . 42 Time Quanta . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Transmit Interrupt ...
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... Register 6-1: TEC - Transmitter Error Counter . . . . . . 42 Register 6-2: REC - Receiver Error Counter Register 6-3: EFLG - Error Flag Register . . . . . . . . . . 43 Table 7-1: ICOD<2:0> Decode Register 7-1: CANINTE - Interrupt Enable Register . . 46 Register 7-2: CANINTF - Interrupt FLAG Register . . . 47 Register 9-1: CANCTRL - CAN Control Register . . . . 52 Register 9-2: CANSTAT - CAN Status Register . . . . . 53 Preliminary MCP2510 DS21291C-page 75 ...
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... Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip ...