MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 74

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PCI Express
17.4.1
Table 59
specified at the component pins.
74
UI
V
V
T
T
MAX-JITTER
T
V
V
IDLE-DELTA
V
V
TX-EYE
TX-EYE-MEDIAN-to-
TX-RISE
TX-DIFFp-p
TX-DE-RATIO
TX-CM-ACp
TX-CM-DC-ACTIVE-
TX-CM-DC-LINE-DELTA
TX-IDLE-DIFFp
Symbol
, T
defines the specifications for the differential output at all transmitters. The parameters are
TX-FALL
Differential Transmitter (TX) Output
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Unit interval
Differential peak-to-
peak output voltage
De- emphasized
differential output
voltage (ratio)
Minimum TX eye width
Maximum time
between the jitter
median and maximum
deviation from the
median.
D+/D– TX output
rise/fall time
RMS AC peak
common mode output
voltage
Absolute delta of DC
common mode voltage
during LO and
electrical idle
Absolute delta of DC
common mode
between D+ and D–
Electrical idle
differential peak output
voltage
Table 59. Differential Transmitter (TX) Output Specifications
Parameter
399.88
0.125
–3.0
0.70
Min
0.8
—
—
0
0
0
Nom
–3.5
400
—
—
—
—
—
—
—
—
400.12
Max
–4.0
0.15
100
1.2
20
25
20
—
—
Unit
mV
mV
mV
mV
dB
ps
UI
UI
UI
V
Each UI is 400 ps ± 300 ppm. UI does not
account for Spread Spectrum Clock
dictated variations. See Note 1.
V
See Note 2.
Ratio of the V
following bits after a transition divided by
the V
transition. See Note 2.
The maximum transmitter jitter can be
derived as T
= 0.3 UI. See Notes 2 and 3.
Jitter is defined as the measurement
variation of the crossing points (V
= 0 V) in relation to a recovered TX UI. A
recovered TX UI is calculated over 3500
consecutive unit intervals of sample data.
Jitter is measured using all edges of the
250 consecutive UI in the center of the
3500 UI used for calculating the TX UI. See
Notes 2 and 3.
See Notes 2 and 5.
V
V
V
V
See Note 2.
|V
(During Electrical Idle)
V
V
V
V
See Note 2.
|V
V
V
See Note 2.
V
<= 20 mV
See Note 2.
TX-DIFFp-p
TX-CM-ACp
TXD–
TX-CM-DC
TX-D–
TX-CM-DC
TX-D–
TX-CM-Idle-DC
TX-D–
TX-CM-DC-D+
TX-CM-DC-D–
TX-IDLE-DIFFp
TX-CM-DC (during LO)
TX-CM-DC-D+
TX-DIFFp-p
|/2 – V
|/2
|/2 [LO]
|/2 [Electrical Idle]
= DC
= DC
= 2*|V
= RMS(|V
TX-MAX-JITTER
TX-CM-DC
TX-DIFFp-p
= DC
= DC
= DC
– V
= |V
Comments
of the first bit after a
(avg)
(avg)
Freescale Semiconductor
|<= 100 mV
TX-D+
TX-CM-DC-D–
TX-IDLE-D+
(avg)
(avg)
(avg)
of |V
of |V
– V
)
TXD+
– V
of |V
of the second and
of |V
of |V
TX-CM-Idle-DC
TX-D+
TX-D+
= 1 – T
–
TX-D–
TX-D–
TX-D+
– V
TX-D+
| <= 25 mV
–
–
TX-IDLE-D–
|.
TX-DIFFp-p
|
TX-EYE
|
–
|