MPC8347VRADDB Freescale Semiconductor, MPC8347VRADDB Datasheet - Page 25

IC MPU POWERQUICC II 620-PBGA

MPC8347VRADDB

Manufacturer Part Number
MPC8347VRADDB
Description
IC MPU POWERQUICC II 620-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8347VRADDB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
266MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
620-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
266 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
266MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
BGA
No. Of Pins
672
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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25
8.2.1.2
Table 26
Figure 9
Freescale Semiconductor
At recommended operating conditions with LV
RX_CLK clock period
RX_CLK duty cycle
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise (20%–80%)
RX_CLK clock fall time (80%–20%)
Note:
1. The symbols for timing specifications follow the pattern of t
G
and t
(GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
to the high state (H) or setup time. Also, t
signals (D) went invalid (X) relative to the t
reference symbol is based on three letters representing the clock of a particular function. For example, the subscript of t
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
(first two letters of functional block)(reference)(state)(signal)(state)
shows the GMII receive AC timing diagram.
provides the GMII receive AC timing specifications.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
GMII Receive AC Timing Specifications
RXD[7:0]
RX_CLK
Parameter/Condition
RX_DV
RX_ER
Table 26. GMII Receive AC Timing Specifications
Figure 9. GMII Receive AC Timing Diagram
t
t
GRXH
GRDVKH
DD
/OV
GRDXKL
GRX
t
DD
GRX
clock reference (K) going to the low (L) state or hold time. In general, the clock
of 3.3 V ± 10%.
symbolizes GMII receive timing (GR) with respect to the time data input
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
t
t
GRXF
GRXH
Symbol
t
t
GRDVKH
GRDXKH
t
t
t
GRXR
GRXF
GRX
t
GRDXKH
/t
GRX
1
t
GRXR
Ethernet: Three-Speed Ethernet, MII Management
Min
2.0
0.5
40
GRDVKH
symbolizes GMII receive timing
Typ
8.0
RX
clock reference (K) going
Max
1.0
1.0
60
for inputs
Unit
ns
ns
ns
ns
ns
%
GRX
25

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