MPC8347VRADDB Freescale Semiconductor, MPC8347VRADDB Datasheet - Page 16

• Manufacturer Part Number: MPC8347VRADDB
• Description: IC MPU POWERQUICC II 620-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8347VRADDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 266 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DDR and DDR2 SDRAM
Table 13
Table 14
GV
16
Output low current (V
Notes:
1. GV
2. MV
3. V
4. Output leakage is measured with all outputs disabled, 0 V
Input/output capacitance: DQ, DQS, DQS
Delta input/output capacitance: DQ, DQS, DQS
Note:
1. This parameter is sampled. GV
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
Output low current (V
Notes:
1. GV
2. MV
3. V
4. Output leakage is measured with all outputs disabled, 0 V
on MV
MV
noise on MV
equal to MV
DD
TT
TT
DD
REF
REF
DD
REF
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to equal
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
(typ) = 2.5 V
is expected to be within 50 mV of the DRAM GV
is expected to be within 50 mV of the DRAM GV
REF
. This rail should track variations in the DC level of MV
is expected to equal 0.5 × GV
is expected to be equal to 0.5 × GV
provides the DDR2 capacitance when GV
provides the recommended operating conditions for the DDR SDRAM component(s) when
Table 12. DDR2 SDRAM DC Electrical Characteristics for GV
Parameter/Condition
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
cannot exceed ±2% of the DC value.
REF
REF
. This rail should track variations in the DC level of MV
Parameter/Condition
Table 14. DDR SDRAM DC Electrical Characteristics for GV
may not exceed ±2% of the DC value.
OUT
OUT
OUT
.
= 0.280 V)
= 0.35 V)
= 1.95 V)
Table 13. DDR2 SDRAM Capacitance for GV
DD
= 1.8 V ± 0.090 V, f = 1 MHz, T
DD
, and to track GV
DD
, and to track GV
Symbol
MV
GV
V
V
I
I
V
I
I
OH
OL
OZ
OL
TT
IH
REF
IL
DD
DD
DD
DD
at all times.
at all times.
≤
≤
DD
DC variations as measured at the receiver. Peak-to-peak noise
V
V
REF
Symbol
(typ) =
OUT
OUT
MV
MV
DD
0.49 × GV
C
C
.
DIO
A
IO
REF
REF
DC variations as measured at the receiver. Peak-to-peak
13.4
≤
≤
2.375
–15.2
–0.3
–9.9
15.2
= 25°C, V
Min
GV
GV
1.8 V.
REF
+ 0.18
– 0.04
DD
DD
.
DD
.
.
OUT
DD
Min
—
6
DD
(typ) = 1.8 V
= GV
(typ) = 1.8 V (continued)
MV
MV
0.51 × GV
GV
DD
DD
REF
REF
2.625
DD
—
Max
–9.9
/2, V
—
—
(typ) = 2.5 V
+ 0.04
+ 0.3
– 0.18
Max
0.5
OUT
8
DD
(peak-to-peak) = 0.2 V.
Freescale Semiconductor
Unit
Unit
mA
mA
mA
μA
pF
pF
V
V
V
V
V
Notes
Notes
—
—
—
—
—
1
2
3
4
1
1