MPC8347VRADDB Freescale Semiconductor, MPC8347VRADDB Datasheet - Page 19

• Manufacturer Part Number: MPC8347VRADDB
• Description: IC MPU POWERQUICC II 620-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8347VRADDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 266 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.2.2
Table 20
Freescale Semiconductor
At recommended operating conditions with GV
MCK[n] cycle time, (MCK[n]/MCK[n] crossing) (PBGA
package)
MCK[n] cycle time, (MCK[n]/MCK[n] crossing) (TBGA
package)
ADDR/CMD/MODT output setup with respect to MCK
400 MHz
333 MHz
266 MHz
200 MHz
ADDR/CMD/MODT output hold with respect to MCK
400 MHz
333 MHz
266 MHz
200 MHz
MCS(n) output setup with respect to MCK
400 MHz
333 MHz
266 MHz
200 MHz
MCS(n) output hold with respect to MCK
400 MHz
333 MHz
266 MHz
200 MHz
MCK to MDQS Skew
MDQ/MECC/MDM output setup with respect to
MDQS
400 MHz
333 MHz
266 MHz
200 MHz
MDQ/MECC/MDM output hold with respect to MDQS
400 MHz
333 MHz
shows the DDR and DDR2 output AC timing specifications.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
DDR and DDR2 SDRAM Output AC Timing Specifications
Parameter
Table 20. DDR and DDR2 SDRAM Output AC Timing Specifications
DD
of (1.8 or 2.5 V) ± 5%.
Symbol
t
t
t
t
t
t
t
t
t
DDKHDX,
DDKHMH
DDKHDS,
DDKHAS
DDKHAX
DDKHCS
DDKHCX
DDKLDS
DDKLDX
t
t
MCK
MCK
1
1100
1200
1.95
2.40
3.15
4.20
1.95
2.40
3.15
4.20
1.95
2.40
3.15
4.20
1.95
2.40
3.15
4.20
–0.6
Min
700
775
700
900
7.5
5
Max
0.6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DDR and DDR2 SDRAM
Unit
ns
ns
ns
ns
ns
ns
ns
ps
ps
Notes
2
2
3
3
3
3
4
5
5
19