EP1S80B956C7N Altera, EP1S80B956C7N Datasheet - Page 817

IC STRATIX FPGA 80K LE 956-BGA

EP1S80B956C7N

Manufacturer Part Number
EP1S80B956C7N
Description
IC STRATIX FPGA 80K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S80B956C7N

Number Of Logic Elements/cells
79040
Number Of Labs/clbs
7904
Total Ram Bits
7427520
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Figure 12–22. Converting POF Programming File to Intel HEX Format
Altera Corporation
September 2004
Partial Programming File Generation
In remote update mode, the Quartus II CPF utility allows an existing
application configuration page to be replaced with new data, or a new
application configuration to be added. Partial programming files are
generated to perform such configuration data updates.
In order to generate a partial programming file, you have to input the
initial POF and new configuration data (SOF) to the Quartus II CPF
utility. In addition, you have to specify the addressing mode (auto or
manual) that was used during initial POF creation. And if block
addressing was used, you should specify the block start and end
Remote System Configuration with Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
12–39

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