EP1S80B956C7N Altera, EP1S80B956C7N Datasheet - Page 386
EP1S80B956C7N
Manufacturer Part Number
EP1S80B956C7N
Description
IC STRATIX FPGA 80K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S80B956C7N
Number Of Logic Elements/cells
79040
Number Of Labs/clbs
7904
Total Ram Bits
7427520
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Clock Modes
2–18
Stratix Device Handbook, Volume 2
Input/Output Clock Mode
The TriMatrix memory blocks can implement input/output clock mode
for true and simple dual-port memory. On each of the two ports, A and B,
one clock controls all registers for inputs into the memory block: data
input, wren, and address. The other clock controls the block’s data output
registers. Each memory block port also supports independent clock
enables and asynchronous clear signals for input and output registers.
Figures 2–10
mode for true and simple dual-port modes, respectively.
and
2–11
show the memory block in input/output clock
Altera Corporation
July 2005
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