EPM7512BFC256-5 Altera, EPM7512BFC256-5 Datasheet - Page 13
![IC MAX 7000 CPLD 512 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM7512BFC256-5
Manufacturer Part Number
EPM7512BFC256-5
Description
IC MAX 7000 CPLD 512 256-FBGA
Manufacturer
Altera
Series
MAX® 7000Br
Datasheet
1.EPM7256BFC256-7.pdf
(66 pages)
Specifications of EPM7512BFC256-5
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
5.5ns
Voltage Supply - Internal
2.375 V ~ 2.625 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
212
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
2.5V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Family Name
MAX 7000B
# Macrocells
512
Number Of Usable Gates
10000
Frequency (max)
166.67MHz
Propagation Delay Time
5.5ns
Number Of Logic Blocks/elements
32
# I/os (max)
212
Operating Supply Voltage (typ)
2.5V
In System Programmable
Yes
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2361
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7512BFC256-5
Manufacturer:
ALTERA
Quantity:
19
Part Number:
EPM7512BFC256-5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EPM7512BFC256-5N
Manufacturer:
ETRON
Quantity:
1 220
Figure 6. I/O Control Block of MAX 7000B Devices
Note:
(1)
Altera Corporation
EPM7032B, EPM7064B, EPM7128B, and EPM7256B devices have six output enable signals. EPM7512B devices have
ten output enable signals.
PIA
from
Macrocell
Fast Input to
Macrocell
Register
to PIA
When the tri-state buffer control is connected to ground, the output is
tri-stated (high impedance) and the I/O pin can be used as a dedicated
input. When the tri-state buffer control is connected to V
enabled.
The MAX 7000B architecture provides dual I/O feedback, in which
macrocell and pin feedbacks are independent. When an I/O pin is
configured as an input, the associated macrocell can be used for buried
logic.
to Other I/O Pins
Programmable Delay
Open-Drain Output
Slew-Rate Control
I/O Standards
6 or 10 Global
Output Enable Signals (1)
GND
VCC
MAX 7000B Programmable Logic Device Data Sheet
OE Select Multiplexer
Bus Hold
CC
Programmable
Programmable
, the output is
Ground
Pull-up
13