MPCBL5524A1D Intel, MPCBL5524A1D Datasheet - Page 65

• Manufacturer Part Number: MPCBL5524A1D
• Manufacturer: Intel

Specifications of MPCBL5524A1D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

A.3.2.5
A.3.2.6
J
Intel NetStructure
Table 23. J6 USB Connector Pinout
Table 24. 7 Ethernet Connectors Pinout
J6 (USB Connectors)
J6 is a 4-pin, Port 0 USB Interface connector on the ZT 5524 / MPCBL5524’s faceplate. USB (Port
1) is directed out rear-panel I/O connector J5. See the “J6 USB Connector Pinout” table for pin
definitions. For a diagram of the faceplate, see
page
J7 (Ethernet Connectors)
J7 is a dual RJ-45 connector on the ZT 5524 / MPCBL5524’s faceplate providing 10 Mbps
(10Base-T), 100 Mbps (100Base-T), and 1000 Mbps (1000Base-T) protocols. Two LEDs are
located inside each RJ-45 connector:
See the “J7 Ethernet Connectors Pinout” table for pin definitions.
These Ethernet signals can be directed out J3 to the backplane. See
Addressing (E4h)” on page 77
•
•
•
•
•
Pin#
®
Pin#
1
2
3
4
5
6
7
8
1
2
3
4
Off indicates 10 Mbps
Green indicates 100 Mbps
Amber indicates 1000 Mbps
Green indicates link
Flashing green indicates activity
ZT 5524 / MPCBL5524 High-Performance System Master Processor Board TPS
13.
+5 V Fused
DATA-
DATA+
GND
Function
MDIO0-
MDIO2-
MDIO1-
MDIO3-
MDIO0
MDIO1
MDIO2
MDIO3
Function
for more information.
Figure 1, “ZT 5524 / MPCBL5524 Faceplate” on
“Ethernet/Geographic
Specifications
65