ADF4002BCPZ Analog Devices Inc, ADF4002BCPZ Datasheet - Page 11

IC PLL FREQUENCY SYNTH 20-LFCSP

ADF4002BCPZ

Manufacturer Part Number
ADF4002BCPZ
Description
IC PLL FREQUENCY SYNTH 20-LFCSP
Manufacturer
Analog Devices Inc
Type
Clock/Frequency Synthesizer (RF), Phase Detectorr
Datasheet

Specifications of ADF4002BCPZ

Design Resources
Very Low Jitter Encode (Sampling) Clocks for High Speed Analog-to-Digital Converters Using ADF4002 (CN0003)
Pll
Yes
Input
CMOS
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
400MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-LFCSP
Frequency-max
400MHz
Pll Type
Frequency Synthesis
Frequency
400MHz
Supply Current
5mA
Supply Voltage Range
2.7V To 3.3V
Digital Ic Case Style
LFCSP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF4002EBZ1 - BOARD EVAL FOR ADF4002
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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REFERENCE COUNTER LATCH MAP
X
= DON’T CARE
BOTH OF THESE BITS
MUST BE SET TO 0 FOR
NORMAL OPERATION.
DB23
X
RESERVED
DB22
0
DB21
0
LDP
0
1
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
LDP
TEST MODE BITS
SHOULD BE SET
TO 00 FOR NORMAL
OPERATION.
MODE BITS
OPERATION
THREE CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
FIVE CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
T2
TEST
T1
ABP2
0
0
1
1
ABP2
BACKLASH
WIDTH
ANTI-
ABP1
ABP1
0
1
0
1
R14
Figure 16. Reference Counter Latch Map
ANTIBACKLASH PULSE WIDTH
2.9ns
NOT ALLOWED
6.0ns
2.9ns
R13
R14
0
0
0
0
.
.
.
1
1
1
1
Rev. A | Page 11 of 20
R12
R11
R13
0
0
0
0
.
.
.
1
1
1
1
R10
14-BIT REFERENCE COUNTER
R12
0
0
0
0
.
.
.
1
1
1
1
R9
DB9
R8
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
DB8
R7
DB7
R6
R3
0
0
0
1
.
.
.
1
1
1
1
DB6
R5
DB5
R4
R2
0
1
1
0
.
.
.
0
0
1
1
DB4
R3
DB3
R2
R1
1
0
1
0
.
.
.
0
1
0
1
DB2
R1
DIVIDE RATIO
1
2
3
4
.
.
.
16380
16381
16382
16383
C2 (0) C1 (0)
ADF4002
DB1
CONTROL
BITS
DB0

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