PNX1300EH NXP Semiconductors, PNX1300EH Datasheet - Page 142

• Manufacturer Part Number: PNX1300EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1300EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
8.7
Figure
tion of the control and status fields of the AI unit. To en-
sure compatibility with future devices, undefined bits in
MMIO registers should be ignored when read, and writ-
ten as ’0’s.
Table 8-8. AI MMIO control fields
Table 8-9. AI MMIO status fields (read only)
8-6
RESET
DIAGMODE
SLEEPLESS
CAP_ENABLE
BUF1_INTEN
BUF2_INTEN
HBE_INTEN
OVR_INTEN
ACK1
ACK2
ACK_HBE
ACK_OVR
BUF1_ACTIVE • If ‘1’, buffer 1 will be used for the next
Field Name
Field Name
8-5,
AUDIO IN OPERATION
Table 8-8
• 1 after RESET.
The AI logic is reset by writing a 0x80000000
to AI_CTL. This bit always reads as a ‘0’.
See
details on software reset.
0 ⇒ normal operation (RESET default)
1 ⇒ diagnostic mode (see
“Diagnostic
0 ⇒ participate in global power down
(RESET default)
1 ⇒ refrain from participating in power down
Capture Enable flag. If 1, AI unit captures
samples and acts as DMA master to write
samples to local SDRAM. If ’0’ (RESET
default), AI unit is inactive.
Buffer 1 full Interrupt Enable. Default 0.
0 ⇒ no interrupt
1 ⇒ interrupt (SOURCE 11) if buffer 1 full
Buffer 2 full interrupt enable. Default 0
0 ⇒ no interrupt
1 ⇒ interrupt (SOURCE 11) if buffer 2 full
HBE Interrupt Enable. Default 0.
0 ⇒ no interrupt
1 ⇒ interrupt (SOURCE 11) if a highway
bandwidth error occurs.
Overrun Interrupt Enable. Default 0
0 ⇒ no interrupt
1 ⇒ interrupt (SOURCE 11) if an overrun
error occurs
Write a ’1’ to clear the BUF1_FULL flag and
remove any pending BUF1_FULL interrupt
request. This bit always reads as 0.
Write a ’1’ to clear the BUF2_FULL flag and
remove any pending BUF2_FULL interrupt
request. This bit always reads as 0.
Write a ’1’ to clear the HBE flag and
remove any pending HBE interrupt request.
This bit always reads as 0.
Write a ’1’ to clear the OVERRUN flag and
remove any pending OVERRUN interrupt
request. This bit always reads as 0.
incoming sample. If ‘0’, buffer 2 will receive
the next sample.
Section 8.7, “Audio In Operation”
and
PRELIMINARY SPECIFICATION
Mode”)
Table 8-9
Description
Description
describe the func-
Section 8.11,
for
Table 8-9. AI MMIO status fields (read only)
The AI unit is reset by a PNX1300 hardware reset, or by
writing 0x80000000 to the AI_CTL register. Upon RE-
SET, capture is disabled (CAP_ENABLE = 0), and
buffer1 is the active buffer (BUF1_ACTIVE=1). A mini-
mum of 5 valid AI_SCK clock cycles is required to allow
internal AI circuitry to stabilize before enabling capture.
This can be accomplished by programming AI_FREQ
and AI_SERIAL and then delaying for the appropriate
time interval.
Programing of the AI_SERIAL MMIO register needs to
follow the following sequence order:
• set AI_FREQ to ensure that a valid clock is gener-
• MMIO(AI_CTL)
• MMIO(AI_SERIAL) = 1 << 31; /* sets serial-master
• MMIO(AI_SERIAL) = (1 << 31) | (SCKDIV value); /*
The DSPCPU initiates capture by providing two equal
size empty buffers and putting their base address and
size in the BASE
cal memory) buffers are assigned, capture can be en-
abled by writing a ‘1’ to CAP_ENABLE. The AI unit hard-
ware now proceeds to fill buffer 1 with input samples.
Once buffer 1 fills up, BUF1_FULL is asserted, and cap-
ture continues without interruption in buffer 2. If
BUF1_INTEN is enabled, a SOURCE 11 interrupt re-
quest is generated.
BUF1_FULL
BUF2_FULL
HBE
OVERRUN
Field Name
ated (Only when AI is the master of the audio clock
system)
mode, starts AI_SCK */
then set DIVIDER values */
• If ‘1’, buffer 1 is full. If BUF1_INTEN is also
• If ‘1’, buffer 2 is full. If BUF2_INTEN is also
• 0 after RESET.
• 0 after RESET.
• Highway Bandwidth Error. Condition raised
• 0 after RESET.
• OVERRUN error occurred, i.e. the CPU did
• 0 after RESET.
n
‘1’, an interrupt request (source 11) is
pending. BUF1_FULL is cleared by writing
a ‘1’ to ACK1, at which point the AI hard-
ware will assume that BASE1 and SIZE
describe a new empty buffer.
‘1’, an interrupt request (source 11) is
pending. BUF2_FULL is cleared by writing
a ‘1’ to ACK2, at which point the AI hard-
ware will assume that BASE2 and SIZE
describe a new empty buffer.
when the 64-byte internal AI buffer is not
yet written to SDRAM when a new input
sample arrives. Indicates insufficient allo-
cation of PNX1300 highway bandwidth for
the audio sampling rate/mode. Refer to
Chapter 20, “Arbiter.”
not provide an empty buffer in time, and 1
or more samples were lost. If OVR_INTEN
is also 1, an interrupt request (source 11) is
pending. The OVERRUN flag can ONLY
be cleared by writing a ‘1’ to ACK_OVR.
and SIZE registers. Once two valid (lo-
= 1 << 31; /* Software Reset */
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Description