MC9S08AW32CFGE Freescale, MC9S08AW32CFGE Datasheet - Page 79

• Manufacturer Part Number: MC9S08AW32CFGE
• Manufacturer: Freescale

Specifications of MC9S08AW32CFGE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

1
2
5.9.8
Freescale Semiconductor
Bit 1 is a reserved bit that must always be written to 0.
This bit can be written only one time after reset. Additional writes are ignored.
LVDACK
Reset
LVDRE
LVDSE
LVDIE
BGBE
LVDE
Field
LVDF
7
6
5
4
3
2
0
W
R
System Power Management Status and Control 1 Register (SPMSC1)
LVDF
Figure 5-10. System Power Management Status and Control 1 Register (SPMSC1)
Low-Voltage Detect Flag — Provided LVDE = 1, this read-only status bit indicates a low-voltage detect event.
Low-Voltage Detect Acknowledge — This write-only bit is used to acknowledge low voltage detection errors
(write 1 to clear LVDF). Reads always return 0.
Low-Voltage Detect Interrupt Enable — This read/write bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF = 1.
Low-Voltage Detect Reset Enable — This read/write bit enables LVDF events to generate a hardware reset
(provided LVDE = 1).
0 LVDF does not generate hardware resets.
1 Force an MCU reset when LVDF = 1.
Low-Voltage Detect Stop Enable — Provided LVDE = 1, this read/write bit determines whether the low-voltage
detect function operates when the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
Low-Voltage Detect Enable — This read/write bit enables low-voltage detect logic and qualifies the operation
of other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
Bandgap Buffer Enable — The BGBE bit is used to enable an internal buffer for the bandgap voltage reference
for use by the ADC module on one of its internal channels.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
0
7
= Unimplemented or Reserved
LVDACK
0
0
6
Table 5-11. SPMSC1 Register Field Descriptions
LVDIE
0
5
MC9S08AW60 Data Sheet, Rev 2
LVDRE
1
4
(2)
Description
LVDSE
Chapter 5 Resets, Interrupts, and System Configuration
3
1
(2)
LVDE
1
2
(2)
1
0
1
BGBE
0
0
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