MC9S08AW32CFGE Freescale, MC9S08AW32CFGE Datasheet - Page 101

• Manufacturer Part Number: MC9S08AW32CFGE
• Manufacturer: Freescale

Specifications of MC9S08AW32CFGE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

6.7.10
In addition to the I/O control, port E pins are controlled by the registers listed below.
Freescale Semiconductor
PTEPE[7:0]
PTESE[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTEPE7
PTESE7
Port E Pin Control Registers (PTEPE, PTESE, PTEDS)
Internal Pullup Enable for Port E Bits— Each of these control bits determines if the internal pullup device is
enabled for the associated PTE pin. For port E pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port E bit n.
1 Internal pullup device enabled for port E bit n.
Output Slew Rate Control Enable for Port E Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTE pin. For port E pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port E bit n.
1 Output slew rate control enabled for port E bit n.
0
0
7
7
Figure 6-32. Output Slew Rate Control Enable for Port E (PTESE)
PTEPE6
PTESE6
0
0
6
6
Figure 6-31. Internal Pullup Enable for Port E (PTEPE)
Table 6-25. PTESE Register Field Descriptions
Table 6-24. PTEPE Register Field Descriptions
PTEPE5
PTESE5
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
PTEPE4
PTESE4
0
0
4
4
Description
Description
PTEPE3
PTESE3
3
0
3
0
PTEPE2
PTESE2
0
0
2
2
Chapter 6 Parallel Input/Output
PTEPE1
PTESE1
0
0
1
1
PTEPE0
PTESE0
0
0
0
0
101