MC9S08AW32CFGE Freescale, MC9S08AW32CFGE Datasheet - Page 28

• Manufacturer Part Number: MC9S08AW32CFGE
• Manufacturer: Freescale

Specifications of MC9S08AW32CFGE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

Chapter 2 Pins and Connections
2.3.1
V
I/O buffer circuitry and to an internal voltage regulator. The internal voltage regulator provides regulated
lower-voltage source to the CPU and other internal circuitry of the MCU.
Typically, application systems have two separate capacitors across the power pins. In this case, there
should be a bulk electrolytic capacitor, such as a 10-μF tantalum capacitor, to provide bulk charge storage
for the overall system and a 0.1-μF ceramic bypass capacitor located as near to the paired V
power pins as practical to suppress high-frequency noise. The MC9S08AW60 has a second V
pin should be connected to the system ground plane or to the primary V
connection.
V
the ADC module. A 0.1-μF ceramic bypass capacitor should be located as near to the analog power pins
as practical to suppress high-frequency noise.
2.3.2
Out of reset, the MCU uses an internally generated clock (self-clocked mode — f
about 8-MHz crystal rate. This frequency source is used during reset startup and can be enabled as the
clock source for stop recovery to avoid the need for a long crystal startup delay. This MCU also contains
a trimmable internal clock generator (ICG) module that can be used to run the MCU. For more information
on the ICG, see the
The oscillator amplitude on XTAL and EXTAL is gain limited for low-power oscillation. Typically, these
pins have a 1-V peak-to-peak signal. For noisy environments, the high gain output (HGO) bit can be set to
enable rail-to-rail oscillation.
The oscillator in this MCU is a Pierce oscillator that can accommodate a crystal or ceramic resonator in
either of two frequency ranges selected by the RANGE bit in the ICGC1 register. Rather than a crystal or
ceramic resonator, an external oscillator can be connected to the EXTAL input pin.
Refer to
resistors such as carbon composition resistors. Wire-wound resistors, and some metal film resistors, have
too much inductance. C1 and C2 normally should be high-quality ceramic capacitors that are specifically
designed for high-frequency applications.
R
value is not generally critical. Typical systems use 1 MΩ to 10 MΩ. Higher values are sensitive to humidity
and lower values reduce gain and (in extreme cases) could prevent startup.
C1 and C2 are typically in the 5-pF to 25-pF range and are chosen to match the requirements of a specific
crystal or resonator. Be sure to take into account printed circuit board (PCB) capacitance and MCU pin
capacitance when sizing C1 and C2. The crystal manufacturer typically specifies a load capacitance which
is the series combination of C1 and C2 which are usually the same size. As a first-order approximation,
use 10 pF as an estimate of combined pin and PCB capacitance for each oscillator pin (EXTAL and
XTAL).
28
F
DD
DDAD
is used to provide a bias path to keep the EXTAL input in its linear range during crystal startup and its
and V
and V
Figure 2-4
Power (V
Oscillator (XTAL, EXTAL)
SS
SSAD
are the primary power supply pins for the MCU. This voltage source supplies power to all
are the analog power supply pins for the MCU. This voltage source supplies power to
Chapter 8, “Internal Clock Generator
for the following discussion. R
DD
, 2 x V
SS
MC9S08AW60 Data Sheet, Rev 2
, V
DDAD
, V
S
SSAD
(when used) and R
(S08ICGV4).”
)
F
SS
should be low-inductance
pin through a low-impedance
Self_reset
Freescale Semiconductor
) equivalent to
DD
SS
and V
pin. This
SS