MC9S08AW32CFGE Freescale, MC9S08AW32CFGE Datasheet - Page 137

• Manufacturer Part Number: MC9S08AW32CFGE
• Manufacturer: Freescale

Specifications of MC9S08AW32CFGE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

8.3.2
Freescale Semiconductor
Reset
LOCRE
LOLRE
Field
MFD
RFD
6:4
2:0
7
3
W
R
LOLRE
ICG Control Register 2 (ICGC2)
Loss of Lock Reset Enable — The LOLRE bit determines what type of request is made by the ICG following a
loss of lock indication. The LOLRE bit only has an effect when LOLS is set.
0
1
Multiplication Factor — The MFD bits control the programmable multiplication factor in the FLL loop. The value
specified by the MFD bits establishes the multiplication factor (N) applied to the reference frequency. Writes to
the MFD bits will not take effect if a previous write is not complete. Select a low enough value for N such that
f
000 Multiplication factor = 4
001 Multiplication factor = 6
010 Multiplication factor = 8
011 Multiplication factor = 10
100 Multiplication factor = 12
101 Multiplication factor = 14
110 Multiplication factor = 16
111 Multiplication factor = 18
Loss of Clock Reset Enable — The LOCRE bit determines how the system manages a loss of clock condition.
0
1
Reduced Frequency Divider — The RFD bits control the value of the divider following the clock select circuitry.
The value specified by the RFD bits establishes the division factor (R) applied to the selected output clock source.
Writes to the RFD bits will not take effect if a previous write is not complete.
000 Division factor = 1
001 Division factor = 2
010 Division factor = 4
011 Division factor = 8
100 Division factor = 16
101 Division factor = 32
110 Division factor = 64
111 Division factor = 128
ICGDCLK
0
7
Generate an interrupt request on loss of lock.
Generate a reset request on loss of lock.
Generate an interrupt request on loss of clock.
Generate a reset request on loss of clock.
does not exceed its maximum specified value.
0
6
Table 8-2. ICGC2 Register Field Descriptions
Figure 8-7. ICG Control Register 2 (ICGC2)
MFD
0
5
MC9S08AW60 Data Sheet, Rev 2
0
4
Description
LOCRE
3
0
Chapter 8 Internal Clock Generator (S08ICGV4)
0
2
RFD
0
1
0
0
137