ISP1508BET STEricsson, ISP1508BET Datasheet - Page 23

• Manufacturer Part Number: ISP1508BET
• Manufacturer: STEricsson

Specifications of ISP1508BET

• Lead Free Status / RoHS Status: Supplier Unconfirmed

NXP Semiconductors
Table 9.
Table 10.
ISP1508A_ISP1508B_2
Product data sheet
Signal name
DIR
STP
NXT
Signal
LINESTATE0
LINESTATE1
Reserved
INT
Reserved
ULPI signal description
Signal mapping during low-power mode
9.2.2 Low-power mode
Direction on
the ISP1508
O
I
O
Maps to
DATA0
DATA1
DATA2
DATA3
DATA[7:4]
When the USB bus is idle, the link can place the ISP1508 into low-power mode (also
called suspend mode). In low-power mode, the data bus definition changes to that shown
in
Control register to logic 0. To exit low-power mode, the link asserts the STP signal. After
exiting low-power mode, the ISP1508 will send an RXCMD to the link if a change was
detected in any interrupt source, and the change still exists. An RXCMD may not be sent if
the interrupt condition is removed before exiting.
The ISP1508 will draw only suspend current from the V
During low-power mode, the clock on XTAL1 can be stopped. The clock must be started
again before asserting STP to exit low-power mode.
For more information on low-power mode enter and exit protocols, refer to UTMI+ Low Pin
Interface (ULPI) Specification Rev. 1.1 .
Table
Signal description
Direction: Controls the direction of data bus DATA[7:0].
In synchronous mode, the ISP1508 drives DIR to LOW by default, making the data bus an
input so that the ISP1508 can listen for TXCMD from the link. The ISP1508 drives DIR to
HIGH only when it has data for the link. When DIR and NXT are HIGH, the byte on the data
bus contains decoded USB data. When DIR is HIGH and NXT is LOW, the byte contains
status information called an RXCMD (receive command). The only exception to this rule is
when the PHY returns register read data, where NXT is also LOW, replacing the usual
RXCMD byte. Every change in DIR causes a turnaround cycle on the data bus, during
which DATA[7:0] are not valid and must be ignored by the link.
DIR is always asserted during low-power, serial and UART modes.
Stop: In synchronous mode, the link drives STP to HIGH for one cycle after the last byte of
data is sent to the ISP1508. The link can optionally assert STP to force DIR to be
de-asserted.
In low-power, serial and UART modes, the link holds STP at HIGH to wake up the ISP1508,
causing the ULPI bus to return to synchronous mode.
Next: In synchronous mode, the ISP1508 drives NXT to HIGH to throttle data. If DIR is
LOW, the ISP1508 asserts NXT to notify the link to place the next data byte on DATA[7:0] in
the following clock cycle. If DIR is HIGH, the ISP1508 asserts NXT to notify the link that a
valid USB data byte is on DATA[7:0] in the current cycle. The ISP1508 always drives an
RXCMD when DIR is HIGH and NXT is LOW, unless register read data is to be returned to
the link in the current cycle.
NXT is not used in low-power, serial and UART modes.
10. To enter low-power mode, the link sets the SUSPENDM bit in the Function
Direction
O
O
O
O
O
…continued
Rev. 02 — 13 March 2008
Description
combinatorial LINESTATE0 directly driven by the analog receiver
combinatorial LINESTATE1 directly driven by the analog receiver
reserved; the ISP1508 will drive this pin to LOW
active HIGH interrupt indication; will be asserted and latched whenever
any unmasked interrupt occurs
reserved; the ISP1508 will drive these pins to LOW
ISP1508A; ISP1508B
CC
ULPI HS USB OTG transceiver
supply. See
Table
© NXP B.V. 2008. All rights reserved.
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