ISP1508BET STEricsson, ISP1508BET Datasheet - Page 21

• Manufacturer Part Number: ISP1508BET
• Manufacturer: STEricsson

Specifications of ISP1508BET

• Lead Free Status / RoHS Status: Supplier Unconfirmed

NXP Semiconductors
9. Modes of operation
Table 8.
[1]
ISP1508A_ISP1508B_2
Product data sheet
Pin name
V
V
REG3V3, REG1V8, DP, DM, V
XTAL1, XTAL2, RREF, PSW_N, FAULT
CHIP_SEL, CFG1, CFG2, TEST_N, STP, NXT,
DIR, DATA[7:0], CLOCK
CC
CC(I/O)
These pins must not be externally driven to HIGH. Otherwise, the ISP1508 behavior is undefined and leakage current will occur.
Pin states in power-down mode
9.1.1 Normal mode
9.1.2 Power-down mode
9.1 Power modes
When both V
to all the remaining pins, including V
range will not damage the ISP1508 chip.
When both V
ISP1508 will be fully functional as in normal mode.
When V
ISP1508, the application system must detect the low voltage condition and set the
CHIP_SEL pin to non-active state to put the ISP1508 in power-down mode. This is to
protect the ULPI and USB interfaces from driving wrong levels. Under this condition, the
V
digital pins (see
inputs. These pins must be driven to defined states or terminated by using pull-up or
pull-down resistors to avoid floating input condition. Other pins (see
powered.
In normal mode, both V
ISP1508 is fully functional.
When V
into power-down mode. In this mode, internal regulators are powered down to keep the
V
V
When V
are not powered. These pins must not be externally driven to HIGH, otherwise the
ISP1508 behavior is undefined and leakage current will occur. Other pins (see
Section
When the ISP1508 is put into power-down mode by disabling the CHIP_SEL pin, all the
digital pins (see
high-impedance inputs. These pins must be driven to defined states or terminated by
CC(I/O)
CC
BUS
current to a minimum. The voltage on the V
BUS
pins. In this mode, the ISP1508 pin states are given in
CC(I/O)
voltage will not leak to USB pins (V
CC(I/O)
CC(I/O)
7.10) are not powered.
, ID, CFG0,
CC(I/O)
CC
is powered and the V
is not present, all digital pins (see
is not present or when the CHIP_SEL pin is not active, the ISP1508 is put
and V
Section
Section
and V
CC(I/O)
Pin state when V
present
3.0 V to 4.5 V
not powered
not powered
not powered
Rev. 02 — 13 March 2008
CC
7.2) powered by V
7.2) that are powered by V
CC
and V
are not powered, there will be no leakage from the V
are powered and are within the operating voltage range, the
CC(I/O)
[1]
[1]
[1]
CC
CC
voltage is below the operating voltage range of the
CC(I/O)
are powered. The CHIP_SEL pin is active. The
and V
CC(I/O)
BUS
is not
CC(I/O)
ISP1508A; ISP1508B
, DP, DM and ID) and the V
CC
Section
are configured as high-impedance
. Applying V
pin will not leak to the V
CC(I/O)
Pin state when V
and CHIP_SEL is HIGH
3.0 V to 4.5 V
1.4 V to 1.95 V
not powered
high-Z
7.2) that are powered by V
ULPI HS USB OTG transceiver
are configured as
Table
BUS
[1]
8.
within the normal
Section
© NXP B.V. 2008. All rights reserved.
CC(I/O)
CC
CC(I/O)
7.10) are not
pin. All the
is present
BUS
and/or
20 of 86
CC(I/O)
pin