ISP1508BET STEricsson, ISP1508BET Datasheet - Page 67

• Manufacturer Part Number: ISP1508BET
• Manufacturer: STEricsson

Specifications of ISP1508BET

• Lead Free Status / RoHS Status: Supplier Unconfirmed

NXP Semiconductors
Table 65.
V
[1]
Table 66.
V
[1]
[2]
Table 67.
V
ISP1508A_ISP1508B_2
Product data sheet
Symbol
t
t
t
C
Symbol
t
t
t
C
Symbol
High-speed driver characteristics
t
t
Full-speed driver characteristics
t
su
h
d(o)
su
h
d(o)
HSR
HSF
FR
CC
CC
CC
L
L
= 3.0 V to 4.5 V; V
Load capacitance on each ULPI pin.
= 3.0 V to 4.5 V; V
Note that the value exceeds that specified in UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1 .
Load capacitance on each ULPI pin.
= 3.0 V to 4.5 V; V
Parameter
set-up time
hold time
output delay
time
load
capacitance
Parameter
rise time (10 % to 90 %)
fall time (10 % to 90 %)
rise time
Parameter
set-up time
hold time
output delay
load
capacitance
Dynamic characteristics: digital I/O pins (SDR)
Dynamic characteristics: digital I/O pins (DDR)
Dynamic characteristics: analog I/O pins (DP, DM) in USB mode
CC(I/O)
CC(I/O)
CC(I/O)
Conditions
set-up time with respect to the positive edge of CLOCK;
input-only pin (STP) and bidirectional pins (DATA[7:0]) as
inputs
hold time with respect to the positive edge of CLOCK;
input-only pin (STP) and bidirectional pins (DATA[7:0]) as
inputs
output delay with respect to the positive edge of CLOCK;
output-only pins (DIR, NXT)
output delay with respect to the positive edge of CLOCK;
bidirectional pins as output (DATA[7:0])
DATA[7:0], CLOCK, DIR, NXT, STP; V
1.65 V
DATA[7:0], CLOCK, DIR, NXT, STP; V
1.95 V
Conditions
set-up time with respect to the positive edge of CLOCK;
input-only pin (STP)
set-up time with respect to the positive and negative
edges of CLOCK; bidirectional pins (DATA[3:0]) as inputs
hold time with respect to the positive edge of CLOCK;
input-only pin (STP)
hold time with respect to the positive and negative edges
of CLOCK; bidirectional pins (DATA[7:0]) as inputs
output delay with respect to the positive edge of CLOCK;
output-only pins (DIR, NXT)
output delay with respect to the positive and negative
edges of CLOCK; bidirectional pins as output (DATA[3:0])
DATA[3:0], CLOCK, DIR, NXT, STP
= 1.4 V to 1.95 V; T
= 1.65 V to 1.95 V; T
= 1.4 V to 1.95 V; T
Conditions
drive 45
drive 45
C
L
= 50 pF; 10 % to 90 % of V
amb
amb
to GND on DP and DM
to GND on DP and DM
amb
Rev. 02 — 13 March 2008
= 40 C to +85 C; unless otherwise specified.
= 40 C to +85 C; unless otherwise specified.
= 40 C to +85 C; unless otherwise specified.
CC(I/O)
CC(I/O)
OH
= 1.4 V to
= 1.65 V to
V
ISP1508A; ISP1508B
OL
[1]
[1]
Min
500
500
4
[1]
[2]
ULPI HS USB OTG transceiver
Min
6.0
0.0
-
-
-
-
Min
6.0
4.4
0.0
0.0
-
-
-
Typ
-
-
-
Typ
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
© NXP B.V. 2008. All rights reserved.
Max
-
-
20
Max
-
-
9.0
9.0
10
20
Max
-
-
-
-
9.0
4.0
15
66 of 86
Unit
ps
ps
ns
Unit
ns
ns
ns
ns
pF
pF
Unit
ns
ns
ns
ns
ns
ns
pF