PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 42

• Manufacturer Part Number: PIC24FJ64GA306-I/MR
• Description: 16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
• Manufacturer: Microchip Technology

PIC24FJ128GA310 FAMILY
4.1.1
The
word-addressable blocks. Although it is treated as
24 bits wide, it is more appropriate to think of each
address of the program memory as a lower and upper
word, with the upper byte of the upper word being
unimplemented. The lower word always has an even
address, while the upper word has an odd address
(Figure
Program memory addresses are always word-aligned
on the lower word and addresses are incremented or
decremented by two during code execution. This
arrangement also provides compatibility with data
memory space addressing and makes it possible to
access data in the program memory space.
4.1.2
All PIC24F devices reserve the addresses between
000000h and 000200h for hard-coded program execu-
tion vectors. A hardware Reset vector is provided to
redirect code execution from the default value of the
PC on device Reset to the actual start of code. A GOTO
instruction is programmed by the user at 000000h with
the actual address for the start of code at 000002h.
PIC24F devices also have two interrupt vector tables,
located from 000004h to 0000FFh and 000100h to
0001FFh. These vector tables allow each of the many
device interrupt sources to be handled by separate
ISRs. A more detailed discussion of the interrupt vector
tables is provided in
Table”.
FIGURE 4-2:
DS39996F-page 42
program
4-2).
0x000001
0x000003
0x000005
0x000007
Address
msw
PROGRAM MEMORY
ORGANIZATION
HARD MEMORY VECTORS
memory
Program Memory
PROGRAM MEMORY ORGANIZATION
Section 8.1 “Interrupt Vector
‘Phantom’ Byte
(read as ‘0’)
00000000
00000000
00000000
00000000
space
most significant word
is
23
organized
in
16
Instruction Width
4.1.3
In PIC24FJ128GA310 family devices, the top four words
of on-chip program memory are reserved for configura-
tion information. On device Reset, the configuration
information is copied into the appropriate Configuration
register. The addresses of the Flash Configuration Word
for devices in the PIC24FJ128GA310 family are shown
in
with the other memory vectors in
The Configuration Words in program memory are a
compact format. The actual Configuration bits are
mapped in several different registers in the configuration
memory space. Their order in the Flash Configuration
Words does not reflect a corresponding arrangement in
the configuration space. Additional details on the device
Configuration Words are provided in
“Special
TABLE 4-1:
PIC24FJ64GA3XX
PIC24FJ128GA3XX
least significant word
Table
Device
4-1. Their location in the memory map is shown
Features”.
8
FLASH CONFIGURATION WORDS
FLASH CONFIGURATION
WORDS FOR
PIC24FJ128GA310 FAMILY
DEVICES
 2010-2011 Microchip Technology Inc.
Program
Memory
(Words)
22,016
44,032
0
Figure
00ABF8h:00ABFEh
0157F8h:0157FEh
Configuration Word
(lsw Address)
PC Address
0x000000
0x000002
0x000004
0x000006
Addresses
4-1.
Section 29.0