DJLXT386LE.B2 S E001 Intel, DJLXT386LE.B2 S E001 Datasheet - Page 43
DJLXT386LE.B2 S E001
Manufacturer Part Number
DJLXT386LE.B2 S E001
Description
Manufacturer
Intel
Datasheet
1.DJLXT386LE.B2_S_E001.pdf
(86 pages)
Specifications of DJLXT386LE.B2 S E001
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Datasheet
ID Register
Analog Loopback
Remote Loopback
TAOS Enable
LOS/AIS Criteria Selection
Software Reset Register
Performance Monitoring
Automatic TAOS Select
Global Control Register
Output Enable Register
Pulse Shaping Indirect
DFM Interrupt Enable
LOS Interrupt Enable
DFM Interrupt Status
LOS Interrupt Status
AIS Interrupt Enable
Table 6. Serial and Parallel Port Register Addresses
DFM Status Monitor
Pulse Shaping Data
Table 7. Register Bit Names
LOS Status Monitor
AIS Status Register
AIS Interrupt Status
Remote Loopback
Analog Loopback
Address Register
Digital Loopback
TAOS Enable
ID Register
Name
Register
Name
Register
Register Descriptions
RLOOP
ALOOP
TAOS
Sym
ID
Symbol
RLOOP
ALOOP
PSDAT
R/W
R/W
R/W
PSIAD
TAOS
LOSC
RW
AISIE
AISIS
MON
GCR
DFM
OER
LOS
RES
ATS
R
DIE
DIS
LIE
LIS
AIS
DL
ID
ID7
7
-
-
-
ID6
6
-
-
-
Serial Port
xx00000
xx00001
xx00010
xx00011
xx00100
xx00101
xx00110
xx00111
xx01000
xx01001
xx01010
xx01011
xx01100
xx01101
xx10000
xx10001
xx10010
xx10011
xx10100
xx10101
xx01110
xx01111
A7-A1
ID5
5
-
-
-
Address
ID4
QUAD T1/E1/J1 Transceiver — LXT386
4
-
-
-
Bit
TAOS3
Parallel Port
AL3
RL3
ID3
xxx00000
xxx00001
xxx00010
xxx00011
xxx00100
xxx00101
xxx00110
xxx01000
xxx01001
xxx01010
xxx01011
xxx01100
xxx01101
xxx10000
xxx10001
xxx10010
xxx10011
xxx10100
xxx10101
xxx00111
xxx01110
3
xxx01111
A7-A0
TAOS2
AL2
RL2
ID2
2
TAOS1
AL1
RL1
ID1
1
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
TAOS0
RL0
AL0
ID0
0
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