LAN9303-ABZJ Standard Microsystems (SMSC), LAN9303-ABZJ Datasheet - Page 8

• Manufacturer Part Number: LAN9303-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303-ABZJ

• Number Of Primary Switch Ports: 3
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: No
• Power Supply Type: Analog
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Compliant

13.4.3 Switch Engine CSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271
13.4.3.26.1Ingress Rate Table Registers .................................................................................................301
13.4.4 Buffer Manager CSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Revision 1.4 (07-07-10)
13.4.2.20
13.4.2.21
13.4.2.22
13.4.2.23
13.4.2.24
13.4.2.25
13.4.2.26
13.4.2.27
13.4.2.28
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13.4.2.41
13.4.2.42
13.4.2.43
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13.4.3.1
13.4.3.2
13.4.3.3
13.4.3.4
13.4.3.5
13.4.3.6
13.4.3.7
13.4.3.8
13.4.3.9
13.4.3.10
13.4.3.11
13.4.3.12
13.4.3.13
13.4.3.14
13.4.3.15
13.4.3.16
13.4.3.17
13.4.3.18
13.4.3.19
13.4.3.20
13.4.3.21
13.4.3.22
13.4.3.23
13.4.3.24
13.4.3.25
13.4.3.26
13.4.3.27
13.4.3.28
13.4.3.29
13.4.3.30
13.4.3.31
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13.4.3.33
13.4.3.34
13.4.3.35
13.4.3.36
13.4.3.37
13.4.3.38
13.4.3.39
13.4.3.40
13.4.4.1
13.4.4.2
13.4.4.3
13.4.4.4
13.4.4.5
13.4.4.6
13.4.4.7
13.4.4.8
13.4.4.9
13.4.4.10
13.4.4.11
13.4.4.12
13.4.4.13
Port x MAC Receive Good Packet Length Count Register (MAC_RX_GOODPKTLEN_CNT_x) ................................................................ 246
Port x MAC Receive Symbol Error Count Register (MAC_RX_SYMBOL_CNT_x) ...................................................................................... 247
Port x MAC Receive Control Frame Count Register (MAC_RX_CTLFRM_CNT_x) .................................................................................... 248
Port x MAC Transmit Configuration Register (MAC_TX_CFG_x) ................................................................................................................ 249
Port x MAC Transmit Flow Control Settings Register (MAC_TX_FC_SETTINGS_x) .................................................................................. 250
Port x MAC Transmit Deferred Count Register (MAC_TX_DEFER_CNT_x) ............................................................................................... 251
Port x MAC Transmit Pause Count Register (MAC_TX_PAUSE_CNT_x) ................................................................................................... 252
Port x MAC Transmit OK Count Register (MAC_TX_PKTOK_CNT_x) ........................................................................................................ 253
Port x MAC Transmit 64 Byte Count Register (MAC_TX_64_CNT_x) ......................................................................................................... 254
Port x MAC Transmit 65 to 127 Byte Count Register (MAC_TX_65_TO_127_CNT_x) ............................................................................... 255
Port x MAC Transmit 128 to 255 Byte Count Register (MAC_TX_128_TO_255_CNT_x) ........................................................................... 256
Port x MAC Transmit 256 to 511 Byte Count Register (MAC_TX_256_TO_511_CNT_x) ........................................................................... 257
Port x MAC Transmit 512 to 1023 Byte Count Register (MAC_TX_512_TO_1023_CNT_x) ....................................................................... 258
Port x MAC Transmit 1024 to Max Byte Count Register (MAC_TX_1024_TO_MAX_CNT_x)..................................................................... 259
Port x MAC Transmit Undersize Count Register (MAC_TX_UNDSZE_CNT_x) .......................................................................................... 260
Port x MAC Transmit Packet Length Count Register (MAC_TX_PKTLEN_CNT_x) .................................................................................... 261
Port x MAC Transmit Broadcast Count Register (MAC_TX_BRDCST_CNT_x) .......................................................................................... 262
Port x MAC Transmit Multicast Count Register (MAC_TX_MULCST_CNT_x) ............................................................................................ 263
Port x MAC Transmit Late Collision Count Register (MAC_TX_LATECOL_CNT_x) ................................................................................... 264
Port x MAC Transmit Excessive Collision Count Register (MAC_TX_EXCCOL_CNT_x)............................................................................ 265
Port x MAC Transmit Single Collision Count Register (MAC_TX_SNGLECOL_CNT_x) ............................................................................. 266
Port x MAC Transmit Multiple Collision Count Register (MAC_TX_MULTICOL_CNT_x) ............................................................................ 267
Port x MAC Transmit Total Collision Count Register (MAC_TX_TOTALCOL_CNT_x)................................................................................ 268
Port x MAC Interrupt Mask Register (MAC_IMR_x) ..................................................................................................................................... 269
Port x MAC Interrupt Pending Register (MAC_IPR_x) ................................................................................................................................. 270
Switch Engine ALR Command Register (SWE_ALR_CMD) ........................................................................................................................ 271
Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0) .......................................................................................................... 272
Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1) .......................................................................................................... 273
Switch Engine ALR Read Data 0 Register (SWE_ALR_RD_DAT_0)........................................................................................................... 275
Switch Engine ALR Read Data 1 Register (SWE_ALR_RD_DAT_1)........................................................................................................... 276
Switch Engine ALR Command Status Register (SWE_ALR_CMD_STS) .................................................................................................... 278
Switch Engine ALR Configuration Register (SWE_ALR_CFG) .................................................................................................................... 279
Switch Engine VLAN Command Register (SWE_VLAN_CMD).................................................................................................................... 280
Switch Engine VLAN Write Data Register (SWE_VLAN_WR_DATA).......................................................................................................... 281
Switch Engine VLAN Read Data Register (SWE_VLAN_RD_DATA) .......................................................................................................... 283
Switch Engine VLAN Command Status Register (SWE_VLAN_CMD_STS) ............................................................................................... 284
Switch Engine DIFFSERV Table Command Register (SWE_DIFFSERV_TBL_CFG)................................................................................. 285
Switch Engine DIFFSERV Table Write Data Register (SWE_DIFFSERV_TBL_WR_DATA) ...................................................................... 286
Switch Engine DIFFSERV Table Read Data Register (SWE_DIFFSERV_TBL_RD_DATA) ....................................................................... 287
Switch Engine DIFFSERV Table Command Status Register (SWE_DIFFSERV_TBL_CMD_STS) ............................................................ 288
Switch Engine Global Ingress Configuration Register (SWE_GLOBAL_INGRSS_CFG)............................................................................. 289
Switch Engine Port Ingress Configuration Register (SWE_PORT_INGRSS_CFG) ..................................................................................... 291
Switch Engine Admit Only VLAN Register (SWE_ADMT_ONLY_VLAN)..................................................................................................... 292
Switch Engine Port State Register (SWE_PORT_STATE)........................................................................................................................... 293
Switch Engine Priority to Queue Register (SWE_PRI_TO_QUE) ................................................................................................................ 294
Switch Engine Port Mirroring Register (SWE_PORT_MIRROR).................................................................................................................. 295
Switch Engine Ingress Port Type Register (SWE_INGRSS_PORT_TYP) ................................................................................................... 296
Switch Engine Broadcast Throttling Register (SWE_BCST_THROT) .......................................................................................................... 297
Switch Engine Admit Non Member Register (SWE_ADMT_N_MEMBER)................................................................................................... 298
Switch Engine Ingress Rate Configuration Register (SWE_INGRSS_RATE_CFG) .................................................................................... 299
Switch Engine Ingress Rate Command Register (SWE_INGRSS_RATE_CMD)......................................................................................... 300
Switch Engine Ingress Rate Command Status Register (SWE_INGRSS_RATE_CMD_STS) .................................................................... 302
Switch Engine Ingress Rate Write Data Register (SWE_INGRSS_RATE_WR_DATA)............................................................................... 303
Switch Engine Ingress Rate Read Data Register (SWE_INGRSS_RATE_RD_DATA) ............................................................................... 304
Switch Engine Port 0 Ingress Filtered Count Register (SWE_FILTERED_CNT_0) ..................................................................................... 305
Switch Engine Port 1 Ingress Filtered Count Register (SWE_FILTERED_CNT_1) ..................................................................................... 306
Switch Engine Port 2 Ingress Filtered Count Register (SWE_FILTERED_CNT_2) ..................................................................................... 307
Switch Engine Port 0 Ingress VLAN Priority Regeneration Table Register (SWE_INGRSS_REGEN_TBL_0) ........................................... 308
Switch Engine Port 1 Ingress VLAN Priority Regeneration Table Register (SWE_INGRSS_REGEN_TBL_1) ........................................... 309
Switch Engine Port 2 Ingress VLAN Priority Regeneration Table Register (SWE_INGRSS_REGEN_TBL_2) ........................................... 310
Switch Engine Port 0 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_0) .................................................................................. 311
Switch Engine Port 1 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_1) .................................................................................. 312
Switch Engine Port 2 Learn Discard Count Register (SWE_LRN_DISCRD_CNT_2) .................................................................................. 313
Switch Engine Interrupt Mask Register (SWE_IMR)..................................................................................................................................... 314
Switch Engine Interrupt Pending Register (SWE_IPR)................................................................................................................................. 315
Buffer Manager Configuration Register (BM_CFG) ...................................................................................................................................... 317
Buffer Manager Drop Level Register (BM_DROP_LVL)............................................................................................................................... 318
Buffer Manager Flow Control Pause Level Register (BM_FC_PAUSE_LVL)............................................................................................... 319
Buffer Manager Flow Control Resume Level Register (BM_FC_RESUME_LVL) ........................................................................................ 320
Buffer Manager Broadcast Buffer Level Register (BM_BCST_LVL)............................................................................................................. 321
Buffer Manager Port 0 Drop Count Register (BM_DRP_CNT_SRC_0) ....................................................................................................... 322
Buffer Manager Port 1 Drop Count Register (BM_DRP_CNT_SRC_1) ....................................................................................................... 323
Buffer Manager Port 2 Drop Count Register (BM_DRP_CNT_SRC_2) ....................................................................................................... 324
Buffer Manager Reset Status Register (BM_RST_STS) .............................................................................................................................. 325
Buffer Manager Random Discard Table Command Register (BM_RNDM_DSCRD_TBL_CMD) ................................................................ 326
Buffer Manager Random Discard Table Write Data Register (BM_RNDM_DSCRD_TBL_WDATA) ........................................................... 327
Buffer Manager Random Discard Table Read Data Register (BM_RNDM_DSCRD_TBL_RDATA)............................................................ 328
Buffer Manager Egress Port Type Register (BM_EGRSS_PORT_TYPE) ................................................................................................... 329
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
DATASHEET
8
SMSC LAN9303/LAN9303i
Datasheet