LAN9303-ABZJ Standard Microsystems (SMSC), LAN9303-ABZJ Datasheet - Page 28
LAN9303-ABZJ
Manufacturer Part Number
LAN9303-ABZJ
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9303-ABZJ.pdf
(367 pages)
Specifications of LAN9303-ABZJ
Number Of Primary Switch Ports
3
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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Revision 1.4 (07-07-10)
PINS
NUM
1
1
Port 0 Mode[2]
Port 0 Mode[1]
Output Data 2
Output Data 1
Configuration
Configuration
Port 0 MII
Port 0 MII
NAME
Strap
Strap
P0_MODE2
P0_MODE1
P0_OUTD2
P0_OUTD1
SYMBOL
Table 3.4 Port 0 MII/RMII Pins (continued)
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
DATASHEET
BUFFER
Note 3.5
Note 3.5
TYPE
(PU)
(PU)
O8
O8
O8
O8
O8
IS
IS
-
28
MII MAC Mode: This pin is the transmit data 2 bit
from the switch to the external PHY.
MII PHY Mode: This pin is the receive data 2 bit
from the switch to the external MAC. The output
driver is disabled when the
is set in the
(VPHY_BASIC_CTRL).
RMII PHY Mode: This pin is not used
This strap configures the mode for Port 0. See
Note
Please refer to the
mode encoding details.
MII MAC Mode: This pin is the transmit data 1 bit
from the switch to the external PHY.
MII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the
is set in the
(VPHY_BASIC_CTRL).
RMII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the
is set in the
(VPHY_BASIC_CTRL).
This strap configures the mode for Port 0. See
Note
Please refer to the
mode encoding details.
3.4.
3.4.
Virtual PHY Basic Control Register
Virtual PHY Basic Control Register
Virtual PHY Basic Control Register
DESCRIPTION
P0_MODE0
P0_MODE0
Isolate (VPHY_ISO)
Isolate (VPHY_ISO)
Isolate (VPHY_ISO)
SMSC LAN9303/LAN9303i
strap entry for
strap entry for
Datasheet
bit
bit
bit
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