LAN9303-ABZJ Standard Microsystems (SMSC), LAN9303-ABZJ Datasheet - Page 171

no-image

LAN9303-ABZJ

Manufacturer Part Number
LAN9303-ABZJ
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9303-ABZJ

Number Of Primary Switch Ports
3
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9303-ABZJ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
BITS
5:0
8
7
6
Duplex Mode (VPHY_DUPLEX)
This bit is used to set the duplex when the
is disabled.
0: Half Duplex
1: Full Duplex
Collision Test (VPHY_COL_TEST)
This bit enables/disables the collision test mode. When set, the collision
signal to the external MAC is active during transmission from the external
MAC.
Note:
0: Collision test mode disabled
1: Collision test mode enabled
Speed Select MSB (VPHY_SPEED_SEL_MSB)
This bit is not used by the Virtual PHY and has no effect. The value returned
is always 0.
RESERVED
Note 13.17 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on
Note 13.18 The isolation does not apply to the MII management pins (MDIO).
It is recommended that this bit be used only when in loopback
mode.
a DWORD boundary. When accessed serially (through the MII management protocol), the
register is 16-bits wide.
DESCRIPTION
DATASHEET
Auto-Negotiation (VPHY_AN)
171
bit
TYPE
R/W
R/W
RO
RO
Revision 1.4 (07-07-10)
DEFAULT
0b
0b
0b
-

Related parts for LAN9303-ABZJ