LAN9303-ABZJ Standard Microsystems (SMSC), LAN9303-ABZJ Datasheet - Page 38

• Manufacturer Part Number: LAN9303-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303-ABZJ

• Number Of Primary Switch Ports: 3
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: No
• Power Supply Type: Analog
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Compliant

Revision 1.4 (07-07-10)
PINS
PINS
NUM
NUM
1
1
1
1
1
1
I
I
Interrupt Output
2
2
System Reset
EEPROM I
EEPROM I
C Slave Serial
C Slave Serial
Input/Output
Input/Output
Serial Clock
Serial Data
(I
(I
2
2
Note: Please refer to
NAME
NAME
Mode)
Mode)
Test 1
Test 2
C Slave
C Slave
Clock
Input
Data
regarding serial management configuration and functionality.
2
2
C
C
SYMBOL
SYMBOL
EE_SDA
EE_SCL
Table 3.6 Serial Management/EEPROM Pins
TEST1
TEST2
nRST
SDA
SCL
IRQ
Chapter 8, "Serial Management," on page 106
Table 3.7 Miscellaneous Pins
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
DATASHEET
BUFFER
BUFFER
O8/OD8
IS/OD8
IS/OD8
IS/OD8
TYPE
TYPE
(PU)
(PD)
IS
IS
AI
IS
38
When the device is accessing an external
EEPROM, this pin is the I
input/output.
Note:
In I
input/output from/to the external master.
Note:
When the device is accessing an external
EEPROM, this pin is the I
output.
Note:
In I
from the external master.
Note:
The polarity, source and buffer type of this signal is
programmable via the
Register
"System Interrupts," on page 55
This active low signal allows external hardware to
reset the device. The device also contains an
internal power-on reset circuit. Thus, this signal
may be left unconnected if an external hardware
reset is not needed. When used, this signal must
adhere to the reset timing requirements as detailed
in the
Strap Timing," on page
This pin must be tied to VDD33IO for proper
operation.
This pin must be tied to VSS for proper operation.
2
2
C slave mode, this pin is the I
C slave mode, this pin is the I
Section 14.5.2, "Reset and Configuration
This pin must be pulled-up by an external
resistor at all times.
This pin must be pulled-up by an external
resistor at all times.
This pin must be pulled-up by an external
resistor at all times.
This pin must be pulled-up by an external
resistor at all times.
(IRQ_CFG). Please refer to
DESCRIPTION
DESCRIPTION
Interrupt Configuration
351.
2
2
C clock input/open-drain
for additional information
C serial data
SMSC LAN9303/LAN9303i
for further details.
2
2
C serial data
C clock input
Chapter 5,
Datasheet