XC5VSX95T-2FF1136I Xilinx Inc, XC5VSX95T-2FF1136I Datasheet - Page 59
![FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VSX95T-2FF1136I
Manufacturer Part Number
XC5VSX95T-2FF1136I
Description
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX95T-2FF1136I
Package
1136FCBGA
Family Name
Virtex®-5
Device Logic Units
94208
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
640
Ram Bits
8994816
Number Of Logic Elements/cells
94208
Number Of Labs/clbs
7360
Total Ram Bits
8994816
Number Of I /o
640
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1136-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
XILXIN
Quantity:
20 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
- XC5VLX30T-1FFG665C_PRODUCT_CHANGE PDF datasheet #4
- Current page: 59 of 385
- Download datasheet (14Mb)
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
CLKIN_DIVIDE_BY_2 Attribute
CLKOUT_PHASE_SHIFT Attribute
CLK_FEEDBACK Attribute
The CLKIN_DIVIDE_BY_2 attribute is used to enable a toggle flip-flop in the input clock
path to the DCM. When set to FALSE, the effective CLKIN frequency of the DCM equals
the source clock frequency driving the CLKIN input. When set to TRUE, the CLKIN
frequency is divided by two before it reaches the rest of the DCM. Thus, the DCM sees half
the frequency applied to the CLKIN input and operates based on this frequency. For
example, if a 100 MHz clock drives CLKIN, and CLKIN_DIVIDE_BY_2 is set to TRUE;
then the effective CLKIN frequency is 50 MHz. Thus, CLK0 output is 50 MHz and CLK2X
output is 100 MHz. The effective CLKIN frequency must be used to evaluate any operation
or specification derived from CLKIN frequency. The possible values for
CLKIN_DIVIDE_BY_2 are TRUE and FALSE. The default value is FALSE.
The CLKOUT_PHASE_SHIFT attribute indicates the mode of the phase shift applied to the
DCM outputs. The possible values are NONE, FIXED, VARIABLE_POSITIVE,
VARIABLE_CENTER, or DIRECT. The default value is NONE.
When set to NONE, a phase shift cannot be performed and a phase-shift value has no effect
on the DCM outputs. When set to FIXED, the DCM outputs are phase-shifted by a fixed
phase from the CLKIN. The phase-shift value is determined by the PHASE_SHIFT
attribute. If the CLKOUT_PHASE_SHIFT attribute is set to FIXED or NONE, then the
PSEN, PSINCDEC, and the PSCLK inputs must be tied to ground.
When set to VARIABLE_POSITIVE, the DCM outputs can be phase-shifted in variable
mode in the positive range with respect to CLKIN. When set to VARIABLE_CENTER, the
DCM outputs can be phase-shifted in variable mode, in the positive and negative range
with respect to CLKIN. If set to VARIABLE_POSITIVE or VARIABLE_CENTER, each
phase-shift increment (or decrement) increases (or decreases) the phase shift by a period of
1/256 x CLKIN period.
When set to DIRECT, the DCM output can be phase-shifted in variable mode in the
positive range with respect to CLKIN. Each phase-shift increment/decrement will
increase/decrease the phase shift by one DCM_TAP. See the Virtex-5 FPGA Data Sheet.
The starting phase in the VARIABLE_POSITIVE and VARIABLE_CENTER modes is
determined by the phase-shift value. The starting phase in the DIRECT mode is always
zero, regardless of the value specified by the PHASE_SHIFT attribute. Thus, the
PHASE_SHIFT attribute should be set to zero when DIRECT mode is used. A non-zero
phase-shift value for DIRECT mode can be loaded to the DCM using Dynamic
Reconfiguration Ports in the Virtex-5 FPGA Configuration Guide.
The CLK_FEEDBACK attribute determines the type of feedback applied to the CLKFB.
The possible values are 1X or NONE. The default value is 1X. When set to 1X, CLKFB pin
must be driven by CLK0. When set to NONE leave the CLKFB pin unconnected.
www.xilinx.com
DCM Attributes
59
Related parts for XC5VSX95T-2FF1136I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![XC5VSX95T-1FFG1136C](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
IC FPGA VIRTEX-5 95K 1136FBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC5VSX95T-1FFG1136I](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
IC FPGA VIRTEX-5 95K 1136FBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC5VSX95T-2FFG1136I](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
IC FPGA VIRTEX-5 95K 1136FBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC5VSX95T-1FF1136C](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC5VSX95T-1FF1136I](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC5VSX95T-2FF1136C](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC5VSX95T-2FFG1136C](/photos/6/73/67306/xilinx-_1136-fbga_tmb.jpg)
Part Number:
Description:
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC9536XL-10VQG44C](/photos/6/70/67071/xc9536xl-10vqg44c_tmb.jpg)
Part Number:
Description:
IC CPLD .8K 36MCELL 44-VQFP
Manufacturer:
Xilinx Inc
Datasheet:
![XC9572XL-10VQG44C](/photos/6/70/67078/xc9572xl-10vqg44c_tmb.jpg)
Part Number:
Description:
IC CPLD 72MCRCELL 10NS 44VQFP
Manufacturer:
Xilinx Inc
Datasheet:
![XC9572XL-10VQG64C](/photos/6/70/67079/xc9572xl-10vqg64c_tmb.jpg)
Part Number:
Description:
IC CPLD 1.6K 72MCELL 64-VQFP
Manufacturer:
Xilinx Inc
Datasheet:
![XC2C64A-7VQG44C](/photos/6/70/67080/xc2c64a-7vqg44c_tmb.jpg)
Part Number:
Description:
IC CR-II CPLD 64MCELL 44-VQFP
Manufacturer:
Xilinx Inc
Datasheet:
![XC9572XL-10TQG100C](/photos/6/70/67082/100-tqfp_tmb.jpg)
Part Number:
Description:
IC CPLD 1.6K 72MCELL 100-TQFP
Manufacturer:
Xilinx Inc
Datasheet:
![XC2C64A-7CPG56C](/photos/6/70/67083/xc2c64a-7cpg56c_tmb.jpg)
Part Number:
Description:
IC CR-II CPLD 64MCELL 56-BGA
Manufacturer:
Xilinx Inc
Datasheet:
![XC9572XL-7VQG44C](/photos/6/70/67084/xc9572xl-7vqg44c_tmb.jpg)
Part Number:
Description:
IC CPLD 72MCRCELL 7.5NS 44VQFP
Manufacturer:
Xilinx Inc
Datasheet:
![XC2C64A-7VQG100C](/photos/6/70/67082/100-tqfp_tmb.jpg)
Part Number:
Description:
IC CR-II CPLD 64MCELL 100-VQFP
Manufacturer:
Xilinx Inc
Datasheet: