M29W128GH70ZA6E NUMONYX, M29W128GH70ZA6E Datasheet - Page 34
![no-image](/images/manufacturer_photos/0/4/484/numonyx_sml.jpg)
M29W128GH70ZA6E
Manufacturer Part Number
M29W128GH70ZA6E
Description
Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 70ns 64-Pin TBGA Tray
Manufacturer
NUMONYX
Datasheet
1.M29W128GH70N6E.pdf
(94 pages)
Specifications of M29W128GH70ZA6E
Package
64TBGA
Cell Type
NOR
Density
128 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3|3.3 V
Sector Size
128KByte x 128
Timing Type
Asynchronous
Operating Temperature
-40 to 85 °C
Interface Type
Parallel
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M29W128GH70ZA6E
Manufacturer:
ST
Quantity:
20 000
6.2
6.2.1
34/94
Fast program commands
The M29W128GH/L offers a set of fast program commands to improve the programming
throughput:
See either
for a summary of the fast program commands.
When V
bypass mode (see
After programming has started, bus read operations in the memory output the status register
content. Write to Buffer Program command can be suspended and then resumed by issuing
a Program Suspend command and a Program Resume command, respectively (see
Section 6.1.8: Program Suspend command
command).
After the fast program operation has completed, the memory will return to read mode,
unless an error has occurred. When an error occurs bus read operations to the memory will
continue to output the status register. A Read/Reset command must be issued to reset the
error condition and return to read mode. One of the erase commands must be used to set all
the bits in a block or in the whole memory from ’0’ to ’1’.
Typical program times are given in
endurance
Write to Buffer Program command
The Write to Buffer Program command makes use of the device’s 32-word/64-byte write
buffer to speed up programming. 32 words/64 bytes can be loaded into the write buffer.
Each write buffer has the same A22-A5 addresses.The Write to Buffer Program command
dramatically reduces system programming time compared to the standard non-buffered
Program command.
When issuing a Write to Buffer Program command, the V
V
See
Five successive steps are required to issue the Write to Buffer Program command:
1.
2.
3.
4.
5.
IH
, or raised to V
Table 17
Write to Buffer Program
Enhanced Buffered Program (valid in x 16 mode only)
Unlock Bypass.
The Write to Buffer Program command starts with two unlock cycles
The third bus write cycle sets up the Write to Buffer Program command. The setup
code can be addressed to any location within the targeted block
The fourth bus write cycle sets up the number of words/bytes to be programmed. Value
N is written to the same block address, where N+1 is the number of words/bytes to be
programmed. N+1 must not exceed the size of the write buffer or the operation will
abort
The fifth cycle loads the first address and data to be programmed
Use N bus write cycles to load the address and data for each word/byte into the write
buffer. Addresses must lie within the range from the start address+1 to the start
address + N-1.
PPH
Table
cycles.
is applied to the V
for details on typical write to buffer program times in both cases.
12,
PPH
Section 6.2.6: Unlock Bypass
Table 13
.
or
PP
Table 14
/write protect pin the memory automatically enters unlock
Table 17: Program, erase times and program, erase
depending on the configuration that is being used,
and
Section 6.1.9: Program Resume
command).
PP
/WP pin can be either held High,