LH28F640BFHE-PBTL70A Sharp Microelectronics, LH28F640BFHE-PBTL70A Datasheet - Page 5

• Manufacturer Part Number: LH28F640BFHE-PBTL70A
• Description: Flash Mem Parallel 3V/3.3V 64M-Bit 4M x 16 70ns 48-Pin TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LH28F640BFHE-PBTL70A

• Package: 48TSOP
• Cell Type: NOR
• Density: 64 Mb
• Architecture: Sectored
• Block Organization: Asymmetrical
• Location Of Boot Block: Bottom
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 8KByte x 8|64KByte x 127
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

The product, which is 4-Plane Page Mode Dual Work (Simultaneous Read while Erase/Program) Flash memory, is a low
power, high density, low cost, nonvolatile read/write storage solution for a wide range of applications. The product can
operate at V
battery life for portable applications.
The product provides high performance asynchronous page mode. It allows code execution directly from Flash, thus
eliminating time consuming wait states. Furthermore, its newly configurative partitioning architecture allows flexible dual
work operation.
The memory array block architecture utilizes Enhanced Data Protection features, and provides separate Parameter and Main
Blocks that provide maximum flexibility for safe nonvolatile code and data storage.
Fast program capability is provided through the use of high speed Page Buffer Program.
Special OTP (One Time Program) block provides an area to store permanent code such as a unique number.
* ETOX is a trademark of Intel Corporation.
• 70/30ns 8-Word Page Mode
• Flexible Partitioning
• Read operations during Block Erase or (Page Buffer)
• Status Register for Each Partition
• 2.7V Read and Write Operations
• V
• Automatic Power Savings Mode Reduces I
• 5µs Typical Erase/Program Suspends
• 4-Word Factory-Programmed Area
• 4-Word User-Programmable Area
• 16-Word Page Buffer
• 5µs/Word (Typ.) at 9.5V V
64M density with 16Bit I/O Interface
High Performance Reads
Configurative 4-Plane Dual Work
Low Power Operation
Enhanced Code + Data Storage
OTP (One Time Program) Block
High Performance Program with Page Buffer
Operating Temperature -40°C to +85°C
CMOS Process (P-type silicon substrate)
Program
in Static Mode
CCQ
for Input/Output Power Supply Isolation
CC
=2.7V-3.6V and V
Page Mode Dual Work Flash MEMORY
PP
PP
LH28F640BFHE-PBTL70A
=1.65V-3.6V or 9.0V-10.0V. Its low voltage operation capability greatly extends
64Mbit (4Mbit×16)
CCR
LHF64FG8
• Eight 4K-word Parameter Blocks
• One-hundred and twenty-seven 32K-word Main
• Bottom Parameter Location
• Individual Block Lock and Block Lock-Down with
• All blocks are locked at power-up or device reset.
• Absolute Protection with V
• Block Erase, Full Chip Erase, (Page Buffer) Word
• 3.0V Low-Power 11µs/Word (Typ.)
• 9.5V No Glue Logic 9µs/Word (Typ.)
• Basic Command Set
• Common Flash Interface (CFI)
• Minimum 100,000 Block Erase Cycles
Flexible Blocking Architecture
Enhanced Data Protection Features
Automated Erase/Program Algorithms
Cross-Compatible Command Support
Extended Cycling Capability
48-Lead TSOP
ETOX
Not designed or rated as radiation hardened
Blocks
Zero-Latency
Program Lockout during Power Transitions
Programming
Production Programming and 0.5s Erase (Typ.)
TM*
Flash Technology
PP
≤V
PPLK
Rev. 2.45
2