LH28F640BFHE-PBTL70A Sharp Microelectronics, LH28F640BFHE-PBTL70A Datasheet - Page 19
![no-image](/images/manufacturer_photos/0/6/603/sharp_microelectronics_sml.jpg)
LH28F640BFHE-PBTL70A
Manufacturer Part Number
LH28F640BFHE-PBTL70A
Description
Flash Mem Parallel 3V/3.3V 64M-Bit 4M x 16 70ns 48-Pin TSOP
Manufacturer
Sharp Microelectronics
Datasheet
1.LH28F640BFHE-PBTL70A.pdf
(50 pages)
Specifications of LH28F640BFHE-PBTL70A
Package
48TSOP
Cell Type
NOR
Density
64 Mb
Architecture
Sectored
Block Organization
Asymmetrical
Location Of Boot Block
Bottom
Typical Operating Supply Voltage
3|3.3 V
Sector Size
8KByte x 8|64KByte x 127
Timing Type
Asynchronous
Operating Temperature
-40 to 85 °C
Interface Type
Parallel
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH28F640BFHE-PBTL70A
Manufacturer:
SHARP
Quantity:
1 000
Part Number:
LH28F640BFHE-PBTL70A 100
Manufacturer:
SHARP
Quantity:
20 000
PCR.15-11 = RESERVED FOR FUTURE
PCR.10-8 = PARTITION CONFIGURATION (PC2-0)
PC2 PC1PC0
0 0 0
0 0 1
0 1 0
1 0 0
000 = No partitioning. Dual Work is not allowed.
001 = Plane1-3 are merged into one partition.
010 = Plane 0-1 and Plane2-3 are merged into one
100 = Plane 0-2 are merged into one partition.
011 = Plane 2-3 are merged into one partition. There are
110 = Plane 0-1 are merged into one partition. There are
101 = Plane 1-2 are merged into one partition. There are
15
R
R
7
(default in a bottom parameter device)
partition respectively.
(default in a top parameter device)
three partitions in this configuration. Dual work
operation is available between any two partitions.
three partitions in this configuration. Dual work
operation is available between any two partitions.
three partitions in this configuration. Dual work
operation is available between any two partitions.
PARTITION1
ENHANCEMENTS (R)
PARTITIONING FOR DUAL WORK
PARTITION1
14
R
R
6
PARTITION1
PARTITION0
Table 13. Partition Configuration Register Definition
PARTITION0
13
R
R
5
PARTITION0
Figure 4. Partition Configuration
PARTITION0
12
R
R
4
LHF64FG8
PCR.7-0 = RESERVED FOR FUTURE
After power-up or device reset, PCR10-8 (PC2-0) is set to
"001" in a bottom parameter device and "100" in a top
parameter device.
See Figure 4 for the detail on partition configuration.
PCR.15-11 and PCR.7-0 are reserved for future use and
should be masked out when checking the partition
configuration register.
PC2 PC1PC0
0 1 1
1 1 0
1 0 1
1 1 1
111 = There are four partitions in this configuration.
11
R
R
3
Each plane corresponds to each partition respec-
tively. Dual work operation is available between any
two partitions.
ENHANCEMENTS (R)
PARTITION2
PARTITION3
PARTITION2
PARTITIONING FOR DUAL WORK
PARTITION2
PC2
10
R
2
PARTITION2
NOTES:
PARTITION1
PARTITION1
PARTITION1
PC1
R
9
1
PARTITION1
PARTITION0
PARTITION0
PARTITION0
PARTITION0
Rev. 2.45
PC0
R
8
0
16