DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 158

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.9 JTAG Interface Timing
Table 11-14. JTAG Interface Timing
(VDD3.3 = 3.3V ±5%, VDD1.8 = 1.8V ±5%, Tj = -40°C to +85°C.)
Note 1: Clock can be stopped high or low.
Figure 11-15. JTAG Interface Timing Diagram
JTCLK Clock Period
JTCLK Clock High:Low Time
JTCLK to JTDI, JTMS Setup Time
JTCLK to JTDI, JTMS Hold Time
JTCLK to JTDO Delay
JTCLK to JTDO HIZ Delay
JTRST Width Low Time
JTDI, JTMS,
PARAMETER
JTCLK
JTRST
JTRST
JTD0
t6
t7
t2
SYMBOL
t2:t3
t1
t4
t5
t6
t7
t8
t4
158 of 167
t1
(Note 1)
t5
CONDITIONS
t3
t8
MIN
100
50
2
2
2
2
1000
TYP
500
MAX
50
50
UNITS
ns
ns
ns
ns
ns
ns
ns