CS8900A-IQ3ZR Cirrus Logic Inc, CS8900A-IQ3ZR Datasheet - Page 65
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CS8900A-IQ3ZR
Manufacturer Part Number
CS8900A-IQ3ZR
Description
Ethernet ICs IC 10Mbps Ethernet Controller 3.3V
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS8900A-CQZ.pdf
(138 pages)
Specifications of CS8900A-IQ3ZR
Ethernet Connection Type
10Base- 2, 10Base- 5, 10Base- F, 10Base- T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps
Maximum Operating Temperature
+ 85 C
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS8900A-IQ3ZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS271F5
4.4.19 Register 16: Self Status
(SelfST, Read-only, Address: PacketPage base + 0136h)
SelfST reports the status of the EEPROM interface and the initialization process.
010110
3,3VActive
INITD
SIBUSY
EEPROMpresent
EEPROMOK
ELpresent
EEsize
Reset value is: 0000 0000 0001 0110
4.4.20 Register 17: Bus Control
(BusCTL, Read/Write, Address: PacketPage base + 0116h)
BusCTL controls the operation of the ISA-bus interface.
010111
CS8900A
Crystal LAN™ Ethernet Controller
EnableIRQ
INITD
7
F
7
F
Reset RxDMA
3.3V Active
Status Register. When reading this register, these bits will be 010110, where the LSB corre-
sponds to Bit 0.
5V supply, this bit is clear.
grammed. The host must not write to PacketPage base + 0040h nor 0042h until SIBUSY is
clear.
bit is clear. If the EEDataIn pin is high after reset, the CS8900A "assumes" that an EEPROM
is present, and this bit is set.
(Bit 9) and EEPROMOK bit (Bit A) are both set. If clear, the EEPROM size is either 128 words
('C56 or 'CS56) or 256 words (C66 or 'CS66). If set, the EEPROM size is 64 words ('C46 or
'CS46).
Register.
These bits provide an internal address used by the CS8900A to identify this as the Chip Self
If the CS8900A is operating on a 3.3V supply, this bit is set. If the CS8900A is operating on a
If set, the CS8900A initialization, including read-in of the EEPROM, is complete.
If set, the EECS output pin is high indicating that the EEPROM is currently being read or pro-
If the EEDataIn pin is low after reset, there is no EEPROM present, and the EEPROMpresent
If set, the checksum of the EEPROM readout was OK.
If set, external logic for Latchable Address bus decode is present.
This bit shows the size of the attached EEPROM and is valid only if the EEPROMpresent bit
These bits provide an internal address used by the CS8900A to identify this as the Bus Control
E
E
6
6
RxDMA size
D
D
5
5
CIRRUS LOGIC PRODUCT DATASHEET
IOCH RDYE
EEsize
C
C
4
4
ELPresent
DMABurst
B
B
3
3
010110
010111
EEPROM OK
MemoryE
A
A
2
2
EEPROM
present
UseSA
1
9
1
9
DMAextend
SIBUSY
0
8
0
8
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