EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 53

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EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–42. EP3SL50 Row Pins Input Timing Parameters (Part 3 of 3)
© July 2010 Altera Corporation
Standard
1.2-V
HSTL
CLASS I
1.2-V
HSTL
CLASS II
3.0-V PCI
3.0-V
PCI-X
I/O
Clock
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
PLL
PLL
PLL
PLL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
Industrial Commercial
-0.655
-0.884
-0.661
-0.884
-0.661
-0.890
-0.655
-0.890
0.904
0.997
0.910
0.997
0.910
1.003
0.904
1.003
Fast Model
-0.645
-0.914
-0.656
-0.914
-0.656
-0.925
-0.645
-0.925
0.906
1.040
0.917
1.040
0.917
1.051
0.906
1.051
-1.291 -1.412 -1.634 -1.580 -1.842 -1.428 -1.639 -1.588 -1.875
-1.291 -1.412 -1.634 -1.580 -1.842 -1.428 -1.639 -1.588 -1.875
-1.291 -1.412 -1.634 -1.580 -1.842 -1.428 -1.639 -1.588 -1.875
-1.288 -1.413 -1.637 -1.583 -1.845 -1.427 -1.644 -1.593 -1.880
-1.288 -1.413 -1.637 -1.583 -1.845 -1.427 -1.644 -1.593 -1.880
-1.297 -1.426 -1.652 -1.598 -1.860 -1.436 -1.654 -1.603 -1.890
1.473
1.473
1.554
1.476
1.554
1.476
1.473
1.557
1.473
1.482
1.1 V
V
C2
CCL
=
-1.503 -1.682 -1.598 -1.620 -1.497 -1.674 -1.587 -1.665
-1.311 -1.418 -1.362 -1.630 -1.322 -1.428 -1.374 -1.666
1.774
1.619
1.774
1.619
1.620
1.773
1.620
1.633
1.1 V
V
C3
CCL
=
1.924
1.864
1.924
1.864
1.867
1.921
1.867
1.882
1.1 V
V
C4
CCL
=
1.808
1.796
1.808
1.796
1.799
1.805
1.799
1.814
1.1 V
V
CCL
=
C4L
1.834
2.057
1.834
2.057
2.060
1.831
2.060
2.075
0.9 V
V
CCL
Stratix III Device Handbook, Volume 2
=
1.768
1.645
1.768
1.645
1.644
1.769
1.644
1.653
1.1 V
V
I3
CCL
=
1.931
1.878
1.931
1.878
1.883
1.926
1.883
1.893
1.1 V
V
I4
CCL
=
1.777
1.814
1.777
1.814
1.819
1.772
1.819
1.829
1.1 V
V
CCL
=
1–43
I4L
1.885
2.090
1.885
2.090
2.095
1.880
2.095
2.105
0.9 V
V
CCL
=
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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