EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 135

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Standards Support
Figure 7–6. RSDS, Mini-LVDS, or PPDS Interface with External Resistor Network on the Top and Bottom I/O
Banks
Note to
(1)
© December 2009
R
S
Figure
= 120
(Note 1)
Ω;
7–6:
R
1
P
Altera Corporation
= 170
Cyclone III Device Family
Emulated RSDS,
Mini-LVDS, or PPDS
Transmitter
Ω
Figure 7–6
output buffers and external resistors.
A resistor network is required to attenuate the output voltage swing to meet RSDS,
mini-LVDS, and PPDS specifications when using emulated transmitters. You can
modify the resistor network values to reduce power or improve the noise margin.
The resistor values chosen must satisfy
Equation 7–1.
Altera recommends that you perform simulations using Cyclone III device family IBIS
models to validate that custom resistor values meet the RSDS, mini-LVDS, or PPDS
requirements.
You can use a single external resistor instead of using three resistors in the resistor
network for an RSDS interface, as shown in
solution reduces the external resistor count while still achieving the required
signaling level for RSDS. However, the performance of the single-resistor solution is
lower than the performance with the three-resistor network.
R
------------------- -
R
S
S
×
+
R
----- -
R
----- -
2
2
P
P
=
50 Ω
shows a RSDS, mini-LVDS, or PPDS interface with two singled-ended
Resistor Network
R
R
S
S
R
P
50 Ω
50 Ω
Equation
Figure
100 Ω
7–1.
7–7. The external single-resistor
RSDS, Mini-LVDS,
or PPDS Receiver
Cyclone III Device Handbook, Volume 1
7–11

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