EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 111

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Chapter 6: I/O Features in the Cyclone III Device Family
I/O Standards
I/O Standards
© December 2009
f
Altera Corporation
Figure 6–5
shown is the intrinsic transistor impedance.
Figure 6–5. Cyclone III Device Family On-Chip Series Termination Without Calibration
All I/O banks and I/O pins support impedance matching and series termination.
Dedicated configuration pins and JTAG pins do not support impedance matching or
series termination.
On-chip series termination is supported on any I/O bank. V
compatible for all I/O pins to enable on-chip series termination in a given I/O bank.
I/O standards that support different R
long as their V
Impedance matching is implemented using the capabilities of the output driver and is
subject to a certain degree of variation, depending on the process, voltage, and
temperature.
For more information about tolerance specification, refer to the
Sheet
The Cyclone III device family supports multiple single-ended and differential I/O
standards. Apart from 3.3-, 3.0-, 2.5-, 1.8-, and 1.5-V support, the Cyclone III device
family also supports 1.2-V I/O standards.
and
Cyclone III LS Device Data Sheet
shows the single-ended I/O standards for OCT without calibration. The R
CCIO
and V
Cyclone III Device Family
Driver Series Termination
REF
are not conflicting.
V
GND
CCIO
R
R
S
S
S
values can reside in the same I/O bank as
chapters.
Z
O
Receiving
Cyclone III Device Handbook, Volume 1
Device
CCIO
Cyclone III Device Data
and V
REF
must be
6–11
S