EP1S30F1020C5N Altera, EP1S30F1020C5N Datasheet - Page 78

Stratix

EP1S30F1020C5N

Manufacturer Part Number
EP1S30F1020C5N
Description
Stratix
Manufacturer
Altera
Datasheet

Specifications of EP1S30F1020C5N

Family Name
Stratix
Number Of Logic Blocks/elements
32470
# I/os (max)
726
Frequency (max)
500MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
32470
Ram Bits
3317184
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant

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Digital Signal Processing Block
2–64
Stratix Device Handbook, Volume 1
Output Selection Multiplexer
The outputs from the various elements of the adder/output block are
routed through an output selection multiplexer. Based on the DSP block
operational mode and user settings, the multiplexer selects whether the
output from the multiplier, the adder/subtractor/accumulator, or
summation block feeds to the output.
Output Registers
Optional output registers for the DSP block outputs are controlled by four
sets of control signals: clock[3..0], aclr[3..0], and ena[3..0].
Output registers can be used in any mode.
Modes of Operation
The adder, subtractor, and accumulate functions of a DSP block have four
modes of operation:
1
Simple Multiplier Mode
In simple multiplier mode, the DSP block drives the multiplier sub-block
result directly to the output with or without an output register. Up to four
18 × 18-bit multipliers or eight 9 × 9-bit multipliers can drive their results
directly out of one DSP block. See
Simple multiplier
Multiply-accumulator
Two-multipliers adder
Four-multipliers adder
Each DSP block can only support one mode. Mixed modes in the
same DSP block is not supported.
Figure
2–35.
Altera Corporation
July 2005

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