EP1S30F1020C5N Altera, EP1S30F1020C5N Datasheet - Page 40

Stratix

EP1S30F1020C5N

Manufacturer Part Number
EP1S30F1020C5N
Description
Stratix
Manufacturer
Altera
Datasheet

Specifications of EP1S30F1020C5N

Family Name
Stratix
Number Of Logic Blocks/elements
32470
# I/os (max)
726
Frequency (max)
500MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
32470
Ram Bits
3317184
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant

Available stocks

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Quantity
Price
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EP1S30F1020C5N
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TriMatrix Memory
Figure 2–14. Shift Register Memory Configuration
2–26
Stratix Device Handbook, Volume 1
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w × m × n Shift Register
m-Bit Shift Register
m-Bit Shift Register
m-Bit Shift Register
m-Bit Shift Register
Memory Block Size
TriMatrix memory provides three different memory sizes for efficient
application support. The large number of M512 blocks are ideal for
designs with many shallow first-in first-out (FIFO) buffers. M4K blocks
provide additional resources for channelized functions that do not
require large amounts of storage. The M-RAM blocks provide a large
single block of RAM ideal for data packet storage. The different-sized
blocks allow Stratix devices to efficiently support variable-sized memory
in designs.
The Quartus II software automatically partitions the user-defined
memory into the embedded memory blocks using the most efficient size
combinations. You can also manually assign the memory to a specific
block size or a mixture of block sizes.
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Altera Corporation
n Number
of Taps
July 2005

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