SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 395

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note 1: In I/O Interface mode, the baud rate for the transfers of the first and second bytes must be 1/16 of the desired baud
Note 2: In case of any negative acknowledge, the boot program returns to a state in which it waits for a command code
Boot ROM
3.5.7
rate.
(3rd byte). In I/O Interface mode, if a communication error occurs, a negative acknowledge does not occur.
57th byte
thru
60th byte
61st byte
thru
64th byte
65th byte
66th byte
thru
69th byte
70th byte
thru
73rd byte
74th byte
75th byte
thru
78th byte
79th byte
thru
82nd byte
83rd byte
84th byte
thru
87th byte
88th byte
thru
91st byte
92nd byte
93rd byte
94th byte
Overview of the Boot Program Commands
program offers these three commands, the details of which are provided on the following subsections.
Byte
When Single Boot mode is selected, the boot program is automatically executed on startup. The boot
Transfer Format for the Show Product Information Command (2 of 2)
RAM Transfer command
The RAM Transfer command stores program code transferred from a host controller to the on-
chip RAM and executes the program once the transfer is successfully completed. The
maximum program size is 4 Kbytes. The RAM storage start address must be within the range
0xFFFF_8000–0xFFFF_8FFFF.
The RAM Transfer command can be used to download a flash programming routine of your
own; this provides the ability to control on-board programming of the flash memory in a
unique manner. The programming routine must utilize the flash memory command sequences
described in Section 3.6.16.
Controller to the TMP1940FDBF
(Wait for the next command code.)
Data Transferred from the
TMP1940FDBF-37
Baud Rate
Start address of a group of the same-size
flash blocks (4 bytes)
00H, 00H, 00H and 00H from the 57th byte
Size (in halfwords) of the same-size flash
blocks (4 bytes)
00H, 40H, 00H and 00H from the 61st byte
Number of flash blocks of the same size
(1 byte) 0FH
Start address of a group of the same-size
flash blocks (4 bytes)
00H, 80H, 07H and 00H from the 66th byte
Size (in halfwords) of the same-size flash
blocks (4 bytes)
00H, 20H, 00H and 00H from the 70th byte
Number of flash blocks of the same size
(1 byte) 01H
Start address of a group of the same-size
flash blocks (4 bytes)
00H, C0H, 07H and 00H from the 75th byte
Size (in halfwords) of the same-size flash
blocks (4 bytes)
00H, 10H, 00H and 00H from the 79th byte
Number of flash blocks of the same size
(1 byte) 01H
Start address of a group of the same-size
flash blocks (4 bytes)
00H, E0H, 07H and 00H from the 84th byte
Size (in halfwords) of the same-size flash
blocks (4 bytes)
00H, 08H, 00H and 00H from the 88th byte
Number of the flash blocks of the same size
(1 byte) 02H
Checksum value for bytes 5 to 92
TMP1940FDBF to the Controller
Data Transferred from the
TMP1940FDBF