SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 365

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
P72
TA2IN
TXD4
P73
TA3OUT
RXD4
P74
TB0IN0
INT5
P75
TB0IN1
INT6
P76
TB0OUT
P77
INT0
P80
TB1IN0
INT7
P81
TB1IN1
INT8
P82
TB1OUT
P83
TB2IN0
INT9
P84
TB2IN1
INTA
P85
TB2OUT
BOOT
P86
TB3OUT
INTLV
P87
P90
TXD0
P91
RXD0
Pin Name
# of Pins
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Input/output
Input
Output
Input/output
Output
Input
Input/output
Input
Input
Input/output
Input
Input
Input/output
Output
Input/output
Input
Input/output
Input
Input
Input/output
Input
Input
Input/output
Output
Input/output
Input
Input
Input/output
Input
Input
Input/output
Output
Input
Input/output
Output
Input
Input/output
Input/output
Output
Input/output
Input
Type
Port 72: Programmable as input or output
8-Bit Timer 2 Input: Input to Timer 2
Serial Transmit Data 4: Programmable as a push-pull or open-drain output
Port 73: Programmable as input or output
8-Bit Timer 3 Output: Output from either Timer 2 or Timer 3
Serial Receive Data 4
Port 74: Programmable as input or output
16-Bit Timer 0 Input 0: Count/capture trigger input to 16-bit Timer 0
Interrupt Request 5: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 75: Programmable as input or output
16-Bit Timer 0 Input 1: Capture trigger input to 16-bit Timer 0
Interrupt Request 6: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 76: Programmable as input or output
16-Bit Timer 0 Output: Output from 16-bit Timer 0
Port 77: Programmable as input or output
Interrupt Request 0: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 80: Programmable as input or output
16-Bit Timer 1 Input 0: Count/capture trigger input to 16-bit Timer 1
Interrupt Request 7: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 81: Programmable as input or output
16-Bit Timer 1 Input 1: Capture trigger input to 16-bit Timer 1
Interrupt Request 8: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 82: Programmable as input or output
16-Bit Timer 1 Output: Output from 16-bit Timer 1
Port 83: Programmable as input or output
16-Bit Timer 2 Input 0: Count/capture trigger input to 16-bit Timer 2
Interrupt Request 9: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 84: Programmable as input or output
16-Bit Timer 2 Input 1: Capture trigger input to 16-bit Timer 2
Interrupt Request A: Programmable to be high-level, low-level, rising-edge or falling-
edge sensitive
Port 85: Programmable as input or output
16-Bit Timer 2 Output: Output from 16-bit Timer 2
Single Boot Mode: If this pin is sampled low at the rising edge of RESET , the
TMP1940FDBF enters Single Boot mode for re-programming of the on-chip flash. If
this pin is sampled high at the rising edge of RESET , the TMP1940FDBF enters
NORMAL mode.
Port 86: Programmable as input or output
16-Bit Timer 3 Output: Output from 16-bit Timer 3
Interleave Mode: The TMP1940FDBF enters Interleave mode when this pin is sampled
high at the rising edge of RESET . During a reset sequence, this pin should be pulled
up to a logic 1 when Interleave mode is used and pulled down to a logic 0 otherwise.
Port 87: Programmable as input or output
This pin is used to select the operating mode during reset. This pin should be pulled
down to a logic 0 during a reset sequence.
Port 90: Programmable as input or output
Serial Transmit Data 0: Programmable as a push-pull or open-drain output
Port 91: Programmable as input or output
Serial Receive Data 0
TMP1940FDBF-7
Function
TMP1940FDBF

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