SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 264

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.8.2
SIO Transfer Modes
The SIOM[1:0] field in the SBI0CR1 is used to select a transfer mode.
(1) 8-Bit Transmit Mode
The SBI supports three SIO transfer modes: receive mode, transmit mode and transmit/receive mode.
Then setting the SIOS bit in the SBI0CR1 initiates a transmission. The contents of the SBI0DBR is
moved to an internal shift register and then shifted out on the SO pin, with the least-significant bit
(LSB) first, synchronous to the serial clock. Once the transmit data is transferred to the shift
register, the SBI0DBR becomes empty, and the buffer-empty interrupt (INTS2) is generated.
interrupt service routine provides the next transmit data to the SBI0DBR. Once the SBI0DBR is
loaded, the SIO interface will automatically get out of the wait state.
to the SBI0DBR before the previous transmit data has been shifted out. Therefore, the data rate is a
function of the maximum latency between when the INTS2 interrupt is generated and when the
SBI0DBR is loaded by the interrupt service routine.
appears on the SO pin between when the SBI0SR.SIOF bit is set and when SCK subsequently goes
low.
or setting the SIOINH bit to 1. If the SIOS bit is cleared, the remaining bits in the SBI0DBR
continue to be shifted out before transmission ends. In this case, software can check the
SBI0SR.SIOF bit to determine whether transmission has come to an end (0 = end-of-transmission).
If the SIOINH bit is set, the ongoing transmission is aborted immediately, and the SIOF bit is
cleared at that point.
the next transmit data. Otherwise, the SIO will stop after sending out dummy data.
INTS2 interrupt
SBI0CR1
SBI0DBR
SBI0CR1
SBI0DBR
Configure the SIO interface in transmit mode and write the transmit data into the SBI0DBR.
In internal clock mode, the SIO interface will be in wait state (SCK will stop) until the INTS2
In external clock mode, the INTS2 interrupt service routine must provide the next transmit data
At the beginning of a transmission, the value of the last bit of the previously transmitted byte
Transmission can be terminated by the INTS2 interrupt service routine clearing the SIOS bit to 0
In external clock mode, the SIOS bit must be cleared before the SIO interface begins shifting out
7 6 5 4 3 2 1 0
0 1 0 0 0 X X X
X X X X X X X X
1 0 0 0 0 X X X
X X X X X X X X
TMP1940CYAF-222
Select transmit mode.
Write the transmit data.
Start transmission.
Write the next transmit data.
TMP1940CYAF