AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 58

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9547
REGISTER MAP
The register addresses and defaults are hexadecimal values. Use the default value when writing to registers and/or bits marked as unused.
Table 36.
Addr
Serial Port Configuration and Part Identification
0x0000
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
System Clock (SYSCLK)
0x0100
0x0101
0x0102
0x0103
0x0104
0x0105
0x0106
0x0107
0x0108
General Configuration
0x0200
0x0201
0x0202
0x0203
0x0204
0x0205
0x0206
0x0207
0x0208
0x0209
0x020A
0x020B
0x020C
0x020D
0x020E
0x020F
0x0210
0x0211
0x0212
0x0213
0x0214
Opt
E
Dup
E
R
R
E
A, E
S
S
S
C
C
C
C
C
C
S
S
S
S
S
S
S
S
C
C
C
C
C
C
C
C
C
C
C
S
S
1
Name
SPI control
Reserved
Silicon
revision level
Device ID
Register
readback
I/O update
Charge pump/
lock detect
control
N divider
System clock
input options
Nominal
system clock
period
System clock
stability
period
M0 control
M1 control
M2 control
M3 control
M4 control
M5 control
M6 control
M7 control
IRQ pin
output mode
IRQ mask
Watchdog
timer
DAC current
I
2
C control
D7
Unidirec-
tional
External
loop filter
enable
Unused
M0 in/out
M1 in/out
M2 in/out
M3 in/out
M4 in/out
M5 in/out
M6 in/out
M7 in/out
Switching
Ref AA
new profile
Ref BB
new profile
DAC
shutdown
Unused
Unused
D6
LSB first/
IncAddr
Charge
pump
mode
(auto/man)
M divider
reset
Closed
Ref AA
validated
Ref BB
validated
Unused
Unused
Unused
Unused
D5
Soft reset
Soft reset
SYSCLK
unlocked
Free run
Ref AA fault
cleared
Ref BB
fault
cleared
Rev. B | Page 58 of 104
Watchdog timer [15:0] (in ms up to 65,535 ms)
M divider[1:0]
Charge pump current[2:0]
Unused
SYSCLK stability period[15:0] (in ms)
Nominal SYSCLK period[15:0] (in fs)
D4
Long
instruction
SYSCLK
locked
Holdover
History
updated
Ref AA fault
Ref BB
fault
DAC full-scale current[7:0]
(1 ns at 1 ppm accuracy)
Silicon revision number
Unused
Unused
Unused
N divider[7:0]
Device ID
Unused
Unused
Unused
M0 function[6:0]
M1 function[6:0]
M2 function[6:0]
M3 function[6:0]
M4 function[6:0]
M5 function[6:0]
M6 function[6:0]
M7 function[6:0]
Distribution
sync
Frequency
unclamped
frequency
multiplier
enable
D3
Frequency
unlocked
Ref A
new profile
Ref B
new profile
Nominal SYSCLK period[20:16]
System clock stability period[19:16] (in ms)
Unused
D2
Lock detect
timer
disable
PLL enable
Watchdog
timer
Frequency
locked
Frequency
clamped
Ref A
validated
Ref B
validated
Unused
Unused
D1
SYSCLK cal
complete
EEPROM
fault
Phase
unlocked
Phase slew
unlimited
Ref A
fault
cleared
Ref B
fault
cleared
DAC full-scale current[9:8]
IRQ pin output mode[1:0]
Lock detect timer[1:0]
SYSCLK source[1:0]
D0
Read buffer
register
I/O update
SYSCLK cal
started
EEPROM
complete
Phase
locked
Phase slew
limited
Ref A
fault
Ref B
fault
Def
0x10
0x00
0xF5
0x48
0x00
0x00
0x18
0x28
0x45
0x40
0x42
0x0F
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x01

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