AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 18

• Manufacturer Part Number: AD9547/PCBZ
• Description: Clock Generator/Synchronizer Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9547/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9547
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9547
• Primary Attributes: 2 Differential or 4 Single Ended Inputs
• Secondary Attributes: CMOS, LVPECL & LVDS Compatible
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9547
TYPICAL PERFORMANCE CHARACTERISTICS
f
DPLL loop bandwidth, PLL off = SYSCLK PLL bypassed, PLL on = SYSCLK PLL enabled, I
SYSCLK PLL loop filter. AVDD, AVDD3, and DVDD at nominal supply voltage, f
otherwise noted.
REF
= input reference clock frequency, f
–100
–120
–130
–140
–150
–160
–110
–100
–110
–120
–130
–140
–150
–160
–70
–80
–90
–70
–80
–90
100
100
Figure 3. Additive Phase Noise (Output Driver = LVPECL),
Figure 4. Additive Phase Noise (Output Driver = LVPECL),
LBW = 1 kHz, f
INTEGRATED RMS JITTER (PHASE NOISE):
5kHz TO 20MHz: 173fs (–75.4dBc)
20kHz TO 80MHz: 315fs (–70.2dBc) (EXTRAPOLATED)
INTEGRATED RMS JITTER (PHASE NOISE):
5kHz TO 20MHz: 333fs (–69.8dBc)
20kHz TO 80MHz: 430fs (–67.6dBc) (EXTRAPOLATED)
1k
1k
LBW = 1 kHz, f
f
f
REF
REF
= 19.44 MHz, f
= 19.44 MHz, f
FREQUENCY OFFSET (Hz)
FREQUENCY OFFSET (Hz)
10k
10k
SYSCLK
= 50 MHz (Crystal), PLL On
SYSCLK
100k
100k
O
O
= 1 GHz, PLL Off
= 155.52 MHz,
= 155.52 MHz,
O
1M
1M
= clock frequency, f
10M
10M
100M
100M
Rev. B | Page 18 of 104
SYSCLK
= SYSCLK input frequency, f
S
–100
–110
–120
–130
–140
–150
–160
–100
–110
–120
–130
–140
–150
–160
–70
–80
–90
–70
–80
–90
= 1 GHz, I
100
100
Figure 5. Additive Phase Noise (Output Driver = LVPECL),
Figure 6. Additive Phase Noise (Output Driver = LVPECL),
LBW = 1 kHz, f
CP
CP
1k
1k
LBW = 1 kHz, f
= SYSCLK PLL charge pump current, LF =
f
f
= automatic mode, LF = internal, unless
REF
REF
S
=internal system clock frequency, LBW =
= 19.44 MHz, f
= 19.44 MHz, f
INTEGRATED RMS JITTER (PHASE NOISE):
5kHz TO 20MHz: 310fs (–64.4dBc)
20kHz TO 80MHz: 330fs (–63.9dBc)
FREQUENCY OFFSET (Hz)
FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (PHASE NOISE):
5kHz TO 20MHz: 103fs (–74.0dBc)
20kHz TO 80MHz: 160fs (–70.1dBc)
10k
10k
SYSCLK
SYSCLK
= 50 MHz (Crystal), PLL On
100k
100k
O
O
= 1 GHz, PLL Off
= 311.04 MHz,
= 311.04 MHz,
1M
1M
10M
10M
100M
100M