PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 335

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44

PIC24FJ64GB004-I/ML

Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
N
Near Data Space ................................................................ 30
O
Oscillator Configuration
Output Compare
Output Compare with Dedicated Timers ........................... 157
P
Packaging ......................................................................... 319
Parallel Master Port. See PMP. ........................................ 227
Peripheral Enable Bits ...................................................... 121
Peripheral Module Disable Bits ......................................... 121
Peripheral Pin Select (PPS) .............................................. 125
Pin Diagrams ................................................................ 2, 3, 4
Pinout Descriptions ............................................................. 11
Pins
Power-Saving Features .................................................... 113
Product Identification System ........................................... 338
Program Memory
Program Space Visibility (PSV) .......................................... 49
Program Verification ......................................................... 285
Pulse-Width Modulation (PWM) Mode .............................. 160
Pulse-Width Modulation. See PWM.
PWM
R
Reader Response ............................................................. 337
Reference Clock Output.................................................... 111
© 2009 Microchip Technology Inc.
Clock Selection ......................................................... 104
Clock Switching......................................................... 108
Initial Configuration on POR ..................................... 104
Secondary Oscillator (SOSC) ................................... 111
USB Operation.......................................................... 110
32-Bit Mode............................................................... 157
Operations ................................................................ 159
Subcycle Resolution ................................................. 162
Synchronous and Trigger Modes.............................. 157
Details ....................................................................... 321
Marking ..................................................................... 319
Available Peripherals and Pins ................................. 125
Configuration Control ................................................ 128
Considerations for Use ............................................. 129
Input Mapping ........................................................... 126
Output Mapping ........................................................ 127
Peripheral Priority ..................................................... 125
Configuring Analog and Digital During ICSP
External Oscillator....................................................... 20
ICSP............................................................................ 19
Master Clear (MCLR).................................................. 18
Power Supply.............................................................. 18
Voltage Regulator ....................................................... 19
Clock Frequency and Clock Switching...................... 113
Access Using Table Instructions................................. 48
Address Construction.................................................. 46
Address Space............................................................ 27
Flash Configuration Words ......................................... 28
Memory Maps ............................................................. 27
Organization................................................................ 28
Program Space Visibility ............................................. 49
Duty Cycle and Period .............................................. 161
Sequence.......................................................... 109
Special Considerations ..................................... 110
Operations .......................................................... 20
PIC24FJ64GB004 FAMILY
Preliminary
Register Maps
Registers
A/D Converter............................................................. 39
Comparators............................................................... 42
CPU Core ................................................................... 31
CRC............................................................................ 42
CTMU ......................................................................... 39
Deep Sleep................................................................. 44
I
ICN ............................................................................. 32
Input Capture.............................................................. 35
Interrupt Controller...................................................... 33
NVM............................................................................ 44
Output Compare ......................................................... 36
Pad Configuration....................................................... 39
Parallel Master/Slave Port .......................................... 41
Peripheral Pin Select .................................................. 43
PMD............................................................................ 45
PORTA ....................................................................... 38
PORTB ....................................................................... 38
PORTC ....................................................................... 38
RTCC.......................................................................... 42
SPI.............................................................................. 38
System........................................................................ 44
Timers......................................................................... 34
UART.......................................................................... 37
USB OTG ................................................................... 40
AD1CHS (A/D Input Select)...................................... 260
AD1CON1 (A/D Control 1)........................................ 257
AD1CON2 (A/D Control 2)........................................ 258
AD1CON3 (A/D Control 3)........................................ 259
AD1CSSL (A/D Input Scan Select)........................... 262
AD1PCFG (A/D Port Configuration) ......................... 261
ALCFGRPT (Alarm Configuration) ........................... 241
ALMINSEC (Alarm Minutes and
ALMTHDY (Alarm Month and Day Value) ................ 244
ALWDHR (Alarm Weekday and Hours Value) ......... 244
BDnSTAT Prototype (Buffer Descriptor n
BDnSTAT Prototype (Buffer Descriptor n
CLKDIV (Clock Divider) ............................................ 107
CMSTAT (Comparator Module Status) .................... 268
CMxCON (Comparator x Control) ............................ 267
CORCON (CPU Control) ............................................ 25
CORCON (CPU Core Control) ................................... 69
CRCCON1 (CRC Control 1) ..................................... 252
CRCCON2 (CRC Control 2) ..................................... 253
CRCXORH (CRC XOR Polynomial, High Byte) ....... 254
CRCXORL (CRC XOR Polynomial, Low Byte)......... 253
CTMUCON (CTMU Control)..................................... 273
CTMUICON (CTMU Current Control) ....................... 274
CVRCON (Comparator Voltage Reference
CW1 (Flash Configuration Word 1) .......................... 276
CW2 (Flash Configuration Word 2) .......................... 278
CW3 (Flash Configuration Word 3) .......................... 280
DEVID (Device ID).................................................... 282
DEVREV (Device Revision)...................................... 282
DSCON (Deep Sleep Control).................................. 119
DSWAKE (Deep Sleep Wake-up Source) ................ 120
I2CxCON (I2Cx Control)........................................... 180
I2CxMSK (I2Cx Slave Mode Address Mask)............ 184
I2CxSTAT (I2Cx Status) ........................................... 182
2
C .............................................................................. 37
Seconds Value) ................................................ 245
Status, CPU Mode)........................................... 201
Status, USB Mode)........................................... 200
Control)............................................................. 270
DS39940C-page 333

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