PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 170

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44

PIC24FJ64GB004-I/ML

Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
PIC24FJ64GB004 FAMILY
To set up the SPI module for the Standard Master mode
of operation:
1.
2.
3.
4.
5.
FIGURE 15-1:
DS39940C-page 168
SSx/FSYNCx
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1 and
SPIxCON2
(SPIxCON1<5>) = 1.
Clear the SPIROV bit (SPIxSTAT<6>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Write the data to be transmitted to the SPIxBUF
register. Transmission (and reception) will start
as soon as data is written to the SPIxBUF
register.
SDOx
SCKx
SDIx
Clear the SPIxIF bit in the respective IFS
register.
Set the SPIxIE bit in the respective IEC
register.
Write the SPIxIP bits in the respective IPC
register to set the interrupt priority.
Read SPIxBUF
Control
Sync
registers
Transfer
SPIx MODULE BLOCK DIAGRAM (STANDARD MODE)
bit 0
with
SPIxBUF
SPIxSR
Control
Clock
Shift Control
MSTEN
Transfer
Preliminary
Write SPIxBUF
Select
Edge
To set up the SPI module for the Standard Slave mode
of operation:
1.
2.
3.
4.
5.
6.
7.
16
Clear the SPIxBUF register.
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1
and
(SPIxCON1<5>) = 0.
Clear the SMP bit.
If the CKE bit (SPIxCON1<8>) is set, then the
SSEN bit (SPIxCON1<7>) must be set to enable
the SSx pin.
Clear the SPIROV bit (SPIxSTAT<6>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Secondary
Prescaler
1:1 to 1:8
Clear the SPIxIF bit in the respective IFS
register.
Set the SPIxIE bit in the respective IEC
register.
Write the SPIxIP bits in the respective IPC
register to set the interrupt priority.
Internal Data Bus
SPIxCON2
1:1/4/16/64
© 2009 Microchip Technology Inc.
Prescaler
Primary
registers
SPIxCON1<1:0>
SPIxCON1<4:2>
Enable
Master Clock
with
F
CY
MSTEN

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