PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 282

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ64GB004 FAMILY
REGISTER 26-3:
DS39940C-page 280
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 23-16
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9-8
bit 7-6
bit 5-0
Note 1:
WPEND
R/PO-1
U-1
U-1
—
—
Digital functions on the SOSCI and SOSCO pins are only available when configured in Digital I/O mode (‘00’).
Unimplemented: Read as ‘1’
WPEND: Segment Write Protection End Page Select bit
1 = Protected code segment lower boundary is at the bottom of program memory (000000h); upper
0 = Protected code segment upper boundary is at the last page of program memory; lower boundary
WPCFG: Configuration Word Code Page Protection Select bit
1 = Last page (at the top of program memory) and Flash Configuration Words are not protected
0 = Last page and Flash Configuration Words are code-protected
WPDIS: Segment Write Protection Disable bit
1 = Segmented code protection disabled
0 = Segmented code protection enabled; protected segment defined by WPEND, WPCFG and
Unimplemented: Read as ‘1’
WUTSEL<1:0>: Voltage Regulator Standby Mode Wake-up Time Select bits
11 = Default regulator start-up time used
01 = Fast regulator start-up time used
x0 = Reserved; do not use
SOSCSEL<1:0>: Secondary Oscillator Power Mode Select bits
11 = SOSC pins in default (high drive strength) oscillator mode
01 = SOSC pins in Low-Power (low drive strength) Oscillator mode
00 = SOSC pins have digital I/O functions (RA4, RB4); SCLKI can be used
10 = Reserved
Unimplemented: Read as ‘1’
WPFP<5:0>: Protected Code Segment Boundary Page bits
Designates the 512 instruction page that is the boundary of the protected code segment, starting with
Page 9 at the bottom of program memory.
If WPEND = 1:
Last address of designated code page is the upper boundary of the segment.
If WPEND = 0:
First address of designated code page is the lower boundary of the segment.
WPCFG
R/PO-1
boundary is the code page specified by WPFP<8:0>
is the code page specified by WPFP<8:0>
WPFPx Configuration bits
U-1
U-1
—
—
CW3: FLASH CONFIGURATION WORD 3
PO = Program Once bit
WPFP5
R/PO-1
WPDIS
R/PO-1
U-1
—
WPFP4
R/PO-1
U-1
U-1
—
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
WUTSEL1
WPFP3
R/PO-1
R/PO-1
U-1
—
WUTSEL0
R/PO-1
R/PO-1
WPFP2
(1)
U-1
—
© 2009 Microchip Technology Inc.
‘0’ = Bit is cleared
SOSCSEL1
WPFP1
R/PO-1
R/PO-1
U-1
—
(1)
SOSCSEL0
WPFP0
R/PO-1
R/PO-1
U-1
—
bit 16
bit 8
bit 0
(1)