SC28L92A1A NXP Semiconductors, SC28L92A1A Datasheet - Page 47
SC28L92A1A
Manufacturer Part Number
SC28L92A1A
Description
UART, DUAL, 3.3V OR 5V, SMD, 28L92
Manufacturer
NXP Semiconductors
Datasheet
1.SC28L92A1B557.pdf
(73 pages)
Specifications of SC28L92A1A
No. Of Channels
2
Supply Voltage Range
2.97V To 3.63V, 4.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
PLCC
No. Of Pins
44
Svhc
No SVHC (18-Jun-2010)
Operating
RoHS Compliant
Data Rate
230.4Kilobaud
Uart Features
Programmable Channel Mode, Line Break Detection & Generation
Rohs Compliant
Yes
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NXP Semiconductors
SC28L92_7
Product data sheet
7.3.12 Interrupt Mask Register (IMR)
The programming of this register selects which bits in the ISR causes an interrupt output.
If a bit in the ISR is a logic 1 and the corresponding bit in the IMR is also a logic 1 the
INTRN output will be asserted. If the corresponding bit in the IMR is a zero, the state of
the bit in the ISR has no effect on the INTRN output. Note that the IMR does not mask the
programmable interrupt outputs OP3 to OP7 or the reading of the ISR.
Table 59.
Table 60.
Bit
7
6
5
4
3
2
1
0
input port
change
7
Symbol
-
-
RxRDYB
FFULLB
TxRDYB
-
-
RxRDYA
FFULLA
TxRDYA
IMR - Interrupt mask register (address 0x5) bit allocation
IMR - Interrupt mask register (address 0x5) bit description
break B
change
6
Description
Input port change.
Channel B change in break.
RxB interrupt.
TxB interrupt.
Counter ready.
Channel A change in break.
RxA interrupt.
TxA interrupt.
Rev. 07 — 19 December 2007
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
RxRDYB
FFULLB
5
TxRDYB
4
counter
ready
3
break A
change
2
RxRDYA
FFULLA
SC28L92
© NXP B.V. 2007. All rights reserved.
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TxRDYA
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