DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 16

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

2–4
Figure 2–2. Device Floorplan for MAX V Devices
Note to
(1) The device shown is a 5M570Z device. 5M1270Z and 5M2210Z devices have a similar floorplan with more LABs. For 5M40Z, 5M80Z, 5M160Z,
Logic Array Blocks
MAX V Device Handbook
and 5M240Z devices, the CFM and UFM blocks are located on the left side of the device.
Figure
Logic Array
I/O Blocks
I/O Blocks
I/O Blocks
2 GCLK
2–2:
Inputs
Blocks
Figure 2–2
Each LAB consists of 10 LEs, LE carry chains, LAB control signals, a local interconnect,
a look-up table (LUT) chain, and register chain connection lines. There are 26 possible
unique inputs into an LAB, with an additional 10 local feedback input lines fed by LE
outputs in the same LAB. The local interconnect transfers signals between LEs in the
same LAB. LUT chain connections transfer the LUT output from one LE to the
shows a floorplan of a MAX V device.
(Note 1)
CFM Block
UFM Block
December 2010 Altera Corporation
Chapter 2: MAX V Architecture
2 GCLK
Inputs
Logic Array
Blocks
Logic Array Blocks