PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 368

• Manufacturer Part Number: PIC18F6680-I/L
• Description: Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
• Manufacturer: Microchip Technology

Specifications of PIC18F6680-I/L

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6585/8585/6680/8680
TABLE 25-1:
DS30491C-page 366
a
bbb
BSR
d
dest
f
fs
fd
k
label
mm
*
*+
*-
+*
n
PRODH
PRODL
s
u
WREG
x
TBLPTR
TABLAT
TOS
PC
PCL
PCH
PCLATH
PCLATU
GIE
WDT
TO
PD
C, DC, Z, OV, N
[
(
< >
italics
]
)
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
Bit address within an 8-bit file register (0 to 7).
Bank Select Register. Used to select the current RAM bank.
Destination select bit
d = 0: store result in WREG
d = 1: store result in file register f
Destination either the WREG register or the specified register file location.
8-bit register file address (0x00 to 0xFF).
12-bit register file address (0x000 to 0xFFF). This is the source address.
12-bit register file address (0x000 to 0xFFF). This is the destination address.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value).
Label name.
The mode of the TBLPTR register for the table read and table write instructions.
Only used with table read and table write instructions:
The relative address (2’s complement number) for relative branch instructions, or the direct address for
call/branch and return instructions.
Product of Multiply High Byte.
Product of Multiply Low Byte.
Fast Call/Return mode select bit
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
Unused or unchanged.
Working register (accumulator).
Don’t care (0 or 1).
The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all
Microchip software tools.
21-bit Table Pointer (points to a program memory location).
8-bit Table Latch.
Top-of-Stack.
Program Counter.
Program Counter Low Byte.
Program Counter High Byte.
Program Counter High Byte Latch.
Program Counter Upper Byte Latch.
Global Interrupt Enable bit.
Watchdog Timer.
Time-out bit.
Power-down bit.
ALU status bits: Carry, Digit Carry, Zero, Overflow, Negative.
Optional.
Contents.
Assigned to.
Register bit field.
In the set of.
User defined term (font is courier).
No change to register (such as TBLPTR with table reads and writes).
Post-Increment register (such as TBLPTR with table reads and writes).
Post-Decrement register (such as TBLPTR with table reads and writes).
Pre-Increment register (such as TBLPTR with table reads and writes).
Description
 2004 Microchip Technology Inc.