HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 78

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
5.4.4.4.5
5.4.4.4.6
Figure 21
Cortina Systems
Device Addressing
All E
start condition to enable the chip to read or write. The device address word consists of a
mandatory one, zero sequence for the four most significant bits. This is common to all
devices. The next 3 bits are the A2, A1 and A0 device address bits that are tied to zero in
a optical module. The eighth bit of the device address is the Read/Write operation select
bit. A Read operation is initiated if this bit is High and a Write operation is initiated if this bit
is Low.
Upon comparison of the device address, the optical module outputs a zero. If a comparison
is not made, the optical module E
When not accessing the optical module E
completely programmable for maximum flexibility.
Random Read Operation
A random Read requires a “dummy” Byte/Write sequence to load the data word address.
The following describes how to achieve the “dummy” Write:
This completes the “dummy” Write and sets the optical module E
desired location.
The following describes how the IXF1110 MAC initiates a current address Read:
Random Read
®
SDA LINE
• The IXF1110 MAC generates a start condition.
• The IXF1110 MAC sends a device address word with the Read/Write bit cleared to
• The optical module acknowledges receipt of the device address word.
• The IXF1110 MAC sends the data word address, which is again acknowledged by the
• The IXF1110 MAC generates another start condition.
• The IXF1110 MAC sends a device address with the Read/Write bit set High
• The optical module acknowledges the device address and serially clocks out the data
• The IXF1110 MAC does not respond with a zero but generates a stop condition (see
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
This ensures a clean protocol termination if there is no more data to transfer at the end
of the reset cycle.
Low, signaling a Write operation.
optical module.
word.
Figure
2
PROMs in Optical Module devices require an 8-bit device address word following a
(* = DON'T CARE bit for 1k)
S
T
A
R
T
21).
M
S
B
ADDRESS
DEVICE
DUMMY WRITE
L
S
B
W
R
T
E
I
W
R
/
M
S
B
2
PROM returns to a standby state.
ADDRESS
WORD
2
PROM, the device address or device ID is
S
B
L
A
C
K
S
T
A
R
T
M
S
B
ADDRESS
DEVICE
B
L
S
R
E
A
D
5.4 Optical Module Interface
2
PROM pointers to the
A
C
K
DATAn
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O
N
A
C
K
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