HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 76
HFIXF1110CC.B3-998844
Manufacturer Part Number
HFIXF1110CC.B3-998844
Description
IC ETHERNET MAC 10PORT 552-CBGA
Manufacturer
Cortina Systems Inc
Specifications of HFIXF1110CC.B3-998844
Controller Type
Ethernet Controller, MAC
Interface
SPI-4.2
Voltage - Supply
1.8 V, 2.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
575-BCBGA Exposed Pad (552 Bumps)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
1008-1010
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IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
5.4.4.2
5.4.4.3
5.4.4.4
Figure 18
5.4.4.4.1
5.4.4.4.2
Cortina Systems
I
This section describes the I
controlled by an internal state machine.
The Serial Clock Line (I
with this clock and is driven off the rising edge by the IXF1110 MAC and off the falling edge
by the optical module. The IXF1110 MAC has only one I
optical modules. I2C_CLK is active only during a READ or WRITE operation, when a valid
READ or WRITE is initiated by writing the I2C Control Ports 0 - 3 ($0x79B) Register (as
defined in
Section 5.4.4.1.2, Write Access Operation Example, on page
The Serial Data (I
and are open drain.
Port Protocol Operation
Clock and Data Transitions
The I
changes only during the I
I
Data Validity Timing
Start Condition
A High-to-Low transition of I
precede any other command (see
Stop Condition
A Low-to-High transition of the I
Read sequence, the stop command places the E
mode (see
®
2
2
C_CLK High periods indicate a start or stop condition.
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
C Protocol Specifics
I
2
2
C_DATA
I
2
C_DATA is normally pulled High with an extra device. Data on the I
C_CLK
Section 5.4.4.1.1, Read Access Operation Example, on page 74
Figure
2
C_DATA_0:9) pins (one per port) are bi-directional for serial data transfer,
19).
2
C_CLK) is an IXF1110 MAC output. The serial data is synchronous
2
C_CLK Low time periods (see
2
2
C protocol behavior supported by the IXF1110 MAC, which is
C_DATA, with I
DATA STABLE
2
C_DATA with I
Figure
19).
2
CHANGE
C_CLK High, is a start condition that must
DATA
2
C_CLK High is a stop condition. After a
2
PROM in the optical in a standby power
DATA STABLE
2
C_CLK line that drives all of the
Figure
75).
18). Data changes during
5.4 Optical Module Interface
2
C_DATA pin
or
Page 76
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