HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 11

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
Revision History
Cortina Systems
Updated
Updated
Updated
Changed the 3.3 V LVTTL overshoot limit to 5.5 V in
Updated the Tcdwd and Tcdrh parameter values in
Updated the Tdatd, Tlath and Tlatl parameter values in
Updated the package drawings in
Removed the ordering and marking information from
available from
Corrected typographical error in Table 103, SPI4-2 RX Calendar ($0x702), on page 168, bits 12 and 13.
First release of this document from Cortina Systems, Inc.
Clock Specification Changes:
RxSymbolError counter clarification:
Clock Voltage Changes:
Added
Table 7 “JTAG Interface Signal Descriptions”
Modified
Figure 6 “Ethernet Frame Format”
Figure 7 “PAUSE Frame Format”
Figure 44 “Markings”
Modified
Globally replaced the following: “AVDD” to “AVDD1P8_1, AVDD1P8_2” and “AVDD2” to “AVDD2P5_1, AVDD2P5_2”.
Globally replaced the following: “AIDD” to “AIDD1P8_1, AIDD1P8_2” and “AIDD2” to “AIDD2P5_1, AIDD2P5_2”.
Corrected ball number for RDAT15_P from K1 to K12 in
Removed Short Runts Threshold Register ($ Port_Index 0x14) and changed to Reserved in
• Changed frequency range for CLK50 from 40 MHz—50 MHz to 42 MHz—50 MHz
• Changed frequency range for RDCLK_x (8 x CLK50) from 320 MHz—400 MHz to 336 MHz—400 MHz
• Added that the counter increments once for each packet that encounters symbol errors during reception. Symbol errors
• Changed voltage for CLK125 from 2.5 V CMOS to 3.3 V LVTTL
• Changed voltage for CLK50 from 2.5 V CMOS to 3.3 V LVTTL
between packets are not counted.
Section n,
Table 11 “Ball List in Alphanumeric Order by Signal Name”
Section 5.4.4.2, I
Figure 29, Analog Power Supply Filter Network, on page
Table 36, 2.5 V CMOS and 3.3 V LVTTL I/O Electrical Characteristics, on page
Figure 47 “Ordering Information - Sample”
www.cortina-systems.com.
552-Ceramic BGA (RoHS-compliant)
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
New image (Added RoHS marking)
2
C Protocol Specifics, on page
Changed Preamble byte count to 7 bytes
Section 9.2, IXF1110 MAC Package Specifics, on page
Changed Preamble byte count to 7 bytes
Changed Standard to 3.3 V LVTTL from 2.5 V CMOS
Revision Date: 8 September 2007
Revision Date: 07 October 2005
Revision Date: August 10, 2004
Revision Date: 13 April 2009
Revision Date: 5 July 2007
Table 39, CPU Timing Parameters, on page
Table 38, Undershoot/Overshoot Limits, on page
Section 9.0, Mechanical Specifications, on page
Table 45, LED Timing Parameters, on page
Table 3 “SPI4-2 Interface Signal
76.
Revision 11.0
Revision 10.1
Revision 10.0
Revision 009
Revision 008
93.
and
Table 12 “Ball List in Alphanumeric Order by Ball
104.
Descriptions”.
169.
“Table 51 “MAC Control Register
106.
112.
169. This information is now
105.
Revision History
Location”:
Page 11
Map”.