SI1000-C-GM Silicon Laboratories Inc, SI1000-C-GM Datasheet - Page 84

• Manufacturer Part Number: SI1000-C-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1000-C-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 20dBm
• Sensitivity: -121dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 85mA
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 20 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4.1 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4352 B
• Supply Current (max): 4.1 mA
• Cpu Family: Si100x
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 25MHz
• Total Internal Ram Size: 4.25KB
• # I/os (max): 22
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 18-chx10-bit
• Instruction Set Architecture: CISC
• Mounting: Surface Mount
• Pin Count: 42
• Package Type: QFN EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1881-5

Si1000/1/2/3/4/5
SFR Definition 5.4. ADC0PWR: ADC0 Burst Mode Power-Up Time
SFR Page = 0xF; SFR Address = 0xBA
84
Name Reserved
Reset
Type
Bit
6:4
3:0
7
Bit
AD0PWR[3:0] ADC0 Burst Mode Power-Up Time.
Reserved
Unused
Name
R
7
0
Read = 0b; Must write 0b.
Read = 0000b; Write = Don’t Care.
Sets the time delay required for ADC0 to power up from a low power state.
For BURSTEN = 0:
For BURSTEN = 1 and AD0EN = 1:
For BURSTEN = 1 and AD0EN = 0:
R
6
0
ADC0 power state controlled by AD0EN.
ADC0 remains enabled and does not enter a low power state after all conver-
sions are complete.
Conversions can begin immediately following the start-of-conversion signal.
ADC0 enters a low power state (as specified in Table 5.1) after all conversions
are complete. 
Conversions can begin a programmed delay after the start-of-conversion sig-
nal.
The ADC0 Burst Mode Power-Up time is programmed according to the follow-
ing equation:
or
AD0PWR
Tstartup
R
5
0
=
=
Tstartup
---------------------- 1

AD0PWR
400ns
Rev. 1.0
R
4
0
–
+
1
400ns
Function
3
1
AD0PWR[3:0]
2
1
R/W
1
1
0
1